GS8640V32T-250中文资料(10)

GS8640V18/32/36T-300/250/200/167

Simplified State Diagram

X

DeselectW

R

W

Simple Synchronous Operation

R

XCW

First Write

RCR

First Read

CR

Simple Burst Synchronous Operation

W

R

Burst Write

CRCW

R

Burst Read

CR

Notes:

1.The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.

2.The upper portion of the diagram assumes active use of only the Enable (E1) and Write (BA, BB, BC, BD, BW, and GW) control inputs, and

that ADSP is tied high and ADSC is tied low.

3.The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and

assumes ADSP is tied high and ADV is tied low.