边缘检测电路的(SOC)(Verilog)(7)

边缘检测电路的硬件实现,用的是Verilog语言,采用的是原理图输入,给出了源代码,对于采用FPGA做图像预处理有着很好的参考价值

2 (C) OOMusou 2008

3

4 Filename : nededge_detection2.v

5 Compiler : Quartus II 7.2 SP3

6 Description : Demo how to design nededge detection circuit 7 Release : 07/06/2008 1.0

8 */

9 module negedge_detection2 (

10 input clk,

11 input rst_n,

12 input i_data_in,

13 output reg o_falling_edge

14 );

15

16 reg r_data_in0;

17

18 always@(posedge clk, negedge rst_n) begin

19 if (!rst_n)

20 r_data_in0 <= 0;

21 else begin

22 r_data_in0 <= i_data_in;

23

24 if ({r_data_in0, i_data_in} == 2'b10)

25 o_falling_edge <= 1;

26 else

27 o_falling_edge <= 0;

28 end

29 end

30

31 endmodule