DELL M411R R02_UMA_集显

5

4

3

2

1

+3.3V/+5V(RT8206B) Page 31+1.1V_ALW_SUS(RT8209A) Page 32D

R02 UMA SYSTEM DIAGRAMD

+1.5V/+0.75V_VTT (RT8207) Page 33+2.5V_RUN(RT9025) Page 34+CPU VCORE(MAX17811) Page 35+VDDP/+VDDR(RT8209A) Page 36 ChargerPage 37

SODIMM0

Dual Channel 1333Mhz

DDR3 Max. 4GB Channel A Page 12Dual Channel 1333Mhz

P_GFX_[0:3]

HDMI

Page 17

AMD35WSocket FS1-LIano APU ( CPU+ GPU ) uPGA 722 pin

DP0

SODIMM1

DDR3 Max. 4GB Channel B Page 13

TRAVIS ANX3110

Travis LVDS

LVDS Page 15

Page 14

C

LANIO Board IO BoardRTL8105E/8111E 10/100/GIGA Page22

C

PCI-EPage 2~6

SIM

WWAN SIM

Page 22

WLAN WiFi+BT3.0 Page 22USB 2.0

UMI

DP1

DP to VGA

DP1_VGA

VGA Page 16 HDD Page 20 ODD Page 20

VGA Board

B

Card ReaderRTS5128Page 19

AMDWebcamPage 15

SATA0 SATA1 SATA3

FAN& THERMALEMC2112Page 28

FCH Hudson-M3

B

USB 3.0& USB2.0 USB 3.0 Re-driver

eSATA&USB2.0

USB3.0&2.0Combo portPage 18

FCBGA 656 pinPage 7~11

USB 2.0 SPI Azalia

Combo portPage 18

USB3.0&2.0 X2PWR SWPage 27

Page 22

IO Board

SPI ROM 4M Byte

Page 24

KBCA

LPCPage 21

SW BoardHOTKEYPage 23

ITE 8518

AUDIO CODECIO BoardALC269Q-VB6-GRPage 22

Speaker Page 2W22 IO Board HP/MICPage 22A

KB

Page 25

TP

Page 25

ROM 512 BytePage 24

Quanta Computer Inc.

HOTKEY Board5

Analog MIC2

PROJECT: R02Size Date: Document Number

TP Board4 3

Page 22

Block DiagramW ednesday, January 12, 2011 Sheet1

Rev 1A 1 of 38

5

4

3

2

1

need check cap near con or chipD

U10F

D

C

AA8 AA9 Y7 Y8 W5 W6 W8 W9 V7 V8 U5 U6 U8 U9 T7 T8 R5 R6 R8 R9 P7 P8 N5 N6 N8 N9 M7 M8 L5 L6 L8 L9

P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15 P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3 P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3 P_ZVDDP

PCI EXPRESS

P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9 P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15 P_GPP_TXP0 P_GPP_TXN0 P_GPP_TXP1 P_GPP_TXN1 P_GPP_TXP2 P_GPP_TXN2 P_GPP_TXP3 P_GPP_TXN3 P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3 P_ZVSS

AA2 AA3 Y2 Y1 Y4 Y5 W2 W3 V2 V1 V4 V5 U2 U3 T2 T1 T4 T5 R2 R3 P2 P1 P4 P5 N2 N3 M2 M1 M4 M5 L2 L3 AD4 AD5 AC2 AC3 AB2 AB1 AB4 AB5 AF1 AF2 AF5 AF4 AE3 AE2 AD1 AD2 K4

PEG_HDMI_TXDP2 PEG_HDMI_TXDN2 PEG_HDMI_TXDP1 PEG_HDMI_TXDN1 PEG_HDMI_TXDP0 PEG_HDMI_TXDN0 PEG_HDMI_TXCP PEG_HDMI_TXCN

C37

C36 C35 C34 C38 C40 C33 C31

0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R

INT_HDMI_TXDP2[17] INT_HDMI_TXDN2[17] INT_HDMI_TXDP1[17] INT_HDMI_TXDN1[17] INT_HDMI_TXDP0[17] INT_HDMI_TXDN0[17] INT_HDMI_TXCP[17] INT_HDMI_TXCN[17]

HDMI

P_GFX_TXP/N[3:0] correspond to DisplayPort 2.

GRAPHICS

C

LAN WLAN

[22] PCIE_RXP0_LAN[22] PCIE_RXN0_LAN[22] PCIE_RXP1_W LAN[22] PCIE_RXN1_W LAN

AC5 AC6 AC8 AC9 AB7 AB8 AA5 AA6 AF8 AF7 AE6 AE5 AE9 AE8 AD8 AD7R93 196/F_6

PCIE_TXP0_LAN_C PCIE_TXN0_LAN_C PCIE_TXP1_C PCIE_TXN1_C

C30 C28 C29 C26

0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R

PCIE_TXP0_LAN[22] PCIE_TXN0_LAN[22] PCIE_TXP1_W LAN[22] PCIE_TXN1_W LAN[22]

LAN WLAN

GPP

[8][8][8][8][8][8][8][8]

UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3

UMI_TXP0_C UMI_TXN0_C UMI_TXP1_C UMI_TXN1_C UMI_TXP2_C UMI_TXN2_C UMI_TXP3_C UMI_TXN3_C R78

C305 C306 C303 C304 C308 C307 C309 C310 196/F_6

0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R

UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3

[8][8][8][8][8][8][8][8]

+1.2V_VDDPR

K5

B

6090030200G_FS1_APU

UMI-LINK

B

CPU: AJ014E0TG00 CPU(722P)ZM14E038X4342 1.4G(PGA) AJ018D0UG00 CPU(722P)ZM18D038X2242 1.8G(PGA)

A

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Llano PCIE/UMI/GPPW ednesday, January 12, 2011 Sheet1

Rev 1A 2 of 38

5

4

3

2

1

U10A[12] M_A_A[15:0] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_BS0 M_A_BS1 M_A_BS2 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7[12][12][12][12][12][12][12][12][12][12][12][12][12][12][12][12][12][12][12][12] M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1

M_A_DQ[0..63][12] MEMORY CHANNEL A MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7

[13] M_B_A[15:0] M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_BS0 M_B_BS1 M_B_BS2 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7[13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13] M_B_DQSP0 M_B_DQSN0 M_B_DQSP1 M_B_DQSN1 M_B_DQSP2 M_B_DQSN2 M_B_DQSP3 M_B_DQSN3 M_B_DQSP4 M_B_DQSN4 M_B_DQSP5 M_B_DQSN5 M_B_DQSP6 M_B_DQSN6 M_B_DQSP7 M_B_DQSN7 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1

U10B

M_B_DQ[0..63][13] MEMORY CHANNEL B MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7

D

[12] M_A_BS[2..0]

U20 R20 R21 P22 P21 N24 N23 N20 N21 M21 U23 M22 L24 AA25 L21 L20 U24 U21 L23 E14 J17 E21 F25 AD27 AC23 AD19 AC15 G14 H14 G18 H18 J21 H21 E27 E26 AE26 AD26 AB22 AA22 AB18 AA18

AA14 AA15 T21 T22 R23 R24 H28 H27 Y25 AA27 V22 AA26 V21 W24 W23

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MA_BANK0 MA_BANK1 MA_BANK2 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

E13 J13 H15 J15 H13 F13 F15 E15 H17 F17 E19 J19 G16 H16 H19 F19 H20 F21 J23 H23 G20 E20 G22 H22 G24 E25 G27 G26 F23 H24 E28 F27 AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25 Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21 AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17 AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

[13] M_B_BS[2..0]

T27 P24 P25 N27 N26 M28 M27 M24 M25 L26 U26 L27 K27 W26 K25 K24 U27 T28 K28 D14 A18 A22 C25 AF25 AG22 AH18 AD14 C15 B15 E18 D18 E22 D22 B26 A26 AG24 AG25 AG21 AF21 AG17 AG18 AH14 AG14 R26 R27 P27 P28 J26 J27 W27 Y28 V25 Y27 V24 V27 V28

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

A14 B14 D16 E16 B13 C13 B16 A16 C17 B18 B20 A20 E17 B17 B19 C19 C21 B22 C23 A24 D20 B21 E23 B23 E24 B25 B27 D28 B24 D24 D26 C27 AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24 AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20 AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16 AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63D

MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13

MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

[13] M_B_DM[7..0]

MB_BANK0 MB_BANK1 MB_BANK2 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 MB_CKE0 MB_CKE1 MB_ODT0 MB_ODT1 MB_CS_L0 MB_CS_L1 MB_RAS_L MB_CAS_L MB_WE_L MB_RESET_L MB_EVENT_L

[12] M_A_DM[7..0]

C

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CKE0 MA_CKE1 MA_ODT0 MA_ODT1 MA_CS_L0 MA_CS_L1 MA_RAS_L MA_CAS_L MA_WE_L MA_RESET_L MA_EVENT_L M_VREF M_ZVDDIO

C

[12] M_A_CKE0[12] M_A_CKE1[12] M_A_ODT0[12] M_A_ODT1[12] M_A_CS#0[12] M_A_CS#1[12] M_A_RAS#[12] M_A_CAS#[12] M_A_W E#B

[13] M_B_CKE0[13] M_B_CKE1[13] M_B_ODT0[13] M_B_ODT1[13] M_B_CS#0[13] M_B_CS#1[13] M_B_RAS#[13] M_B_CAS#[13] M_B_W E#[13] M_B_RST#[13] M_B_EVENT#

[12] M_A_RST#[12] M_A_EVENT#

H25 M_A_EVENT# T24+M_VREF

J25 M_B_EVENT# T25

B

W20 W21

+1.5V_SUS

R67

39.2/F

Place close to APU within 1"6090030200G_FS1_APU

6090030200G_FS1_APU

Soldermask openings for all bottom side vias/TPs under FS1+1.5V_SUS

R51 1K/F 34+M_VREF+1.5V_SUSA

R55 R57

1K 1K

M_A_EVENT# M_B_EVENT#

R53 1K/F

C32 *1000P_NC

C25 0.1U/16V/X7R

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Llano DDR3 MEM I/FW ednesday, January 12, 2011 Sheet1

Rev 1A of 38

5

4

3

2

1

D

DISPLAY PORT 0

|--------------------------------------------------------------------|| SVC| SVD BOOT VOLTAGE||| VFIX@O2 VRM VFIX@O2 VRM|||= GND= HIGH|| -------------------------------------------------------------------|| 0| 0 1.1 1.4|| 0| 1 1.0 1.2|| 1| 0 0.9 1.0|| 1| 1 0.8 0.8||--------------------------------------------------------------------|

LVDS For DP0[14] PEG_LVDS_TXP0[14] PEG_LVDS_TXN0[14] PEG_LVDS_TXP1[14] PEG_LVDS_TXN1 C322 0.1U/16V/X7R C319 0.1U/16V/X7R C325 0.1U/16V/X7R C324 0.1U/16V/X7R PEG_LVDS_TXP0_C PEG_LVDS_TXN0_C PEG_LVDS_TXP1_C PEG_LVDS_TXN1_C F2 F1 E3 E2 D2 D1

U10C ANALOG/DISPLAY/MISC DP0_TXP0 DP0_AUXP DP0_TXN0 DP0_AUXN DP0_TXP1 DP0_TXN1 DP0_TXP2 DP0_TXN2 DP0_TXP3 DP0_TXN3 DP1_TXP0 DP1_TXN0 DP1_TXP1 DP1_TXN1 DISPLAY PORT 1 DP1_TXP2 DP1_TXN2 DP1_TXP3 DP1_TXN3 CLKIN_H CLKIN_L DISP_CLKIN_H DISP_CLKIN_L SVC SVD SIC SID RESET_L PWROK PROCHOT_L THERMTRIP_L ALERT_L TDI TDO

TCK TMS TRST_L DBRDY DBREQ_L RSVD_1 RSVD_2 RSVD_3 VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE DP1_AUXP DP1_AUXN DP2_AUXP DP2_AUXN DP3_AUXP DP3_AUXN DISPLAY PORT MISC. DP4_AUXP DP4_AUXN DP5_AUXP DP5_AUXN DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD DP_BLON DP_DIGON DP_VARY_BL DP_AUX_ZVSS TEST6 TEST9 TEST10 TEST12 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST21 TEST22 TEST23 TEST24 TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L TEST31 TEST32_H TEST32_L TEST35 SER. D4 D5 E5 E6 J5 J6 H4 H5 G5 G6 F4 F5 D7 E7 J7 H7 G7 F7 C6 C5 C7 D8 AA10 G10 H10 H12 D9 E9 G9 H9 H11 G11 F12 E11 D11 F10 G12 AH10 AH9 K7 K8 AA12 AB12 K22 AB11 AA11 D10 Y11 AB10 AE12 AD12 LVDS_HPD_Q VGA_HPD_Q INT_HDMI_HPD_Q LVDS_AUXP_C LVDS_AUXN_C C107 C108

Check list need add ESD part near conINT_LVDS_AUXP 0.1U/16V/X7R INT_LVDS_AUXN 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R INT_LVDS_AUXP[14] INT_LVDS_AUXN[14]

3

+1.5V_SUS

R279 R278

1K 1K

SVC SVD

[9] APU_DP_TXP1[9] APU_DP_TXN1[9] APU_DP_TXP2[9] APU_DP_TXN2[9] APU_DP_TXP3[9] APU_DP_TXN3

C316 0.1U/16V/X7R C315 0.1U/16V/X7R C318 0.1U/16V/X7R C317 0.1U/16V/X7R C320 0.1U/16V/X7R C323 0.1U/16V/X7R

APU_DP_TXP1_C APU_DP_TXN1_C APU_DP_TXP2_C APU_DP_TXN2_C APU_DP_TXP3_C APU_DP_TXN3_C

J3 J2 H2 H1 G2 G3 AH7 AH6 AH4 AH3

INT_HDMI_HPD_Q LVDS_HPD_Q[14] R124 10K 57 APU_BLEN APU_DIGON R96 150/F APU_TEST6 APU_TEST9 APU_TEST10 APU_TEST12_SCANSHIFTEND APU_TEST14_BP0 APU_TEST15_BP1 APU_TEST16_BP2 APU_TEST17_BP3 APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST21_SCANEN APU_TEST22_SCANSHIFTEN APU_TEST23 APU_TEST24_SCANCLK1 APU_TEST25_H APU_TEST25_L APU_TEST28_H APU_TEST28_L ANATSTIN_H ANATSTIN_L M_TEST APU_TEST32_H APU_TEST32_L APU_TEST35 FS1R1 DMAACTIVE_L APU_TEST4 APU_TEST5 TP2 TP3 TP7 3 TP11 TP17 TP13 TP12 TP14 APU_TEST18_PLLTEST1[6] APU_TEST19_PLLTEST0[6] R148 2 100K FCH_VGA_HPD[9] TP30 TP29 APU_BLPWM[14]+1.5V_SUS R126 100K

Note: CLK_APU_HCLKP/N is 100MHZ SSC Note: CLK_DP_NSSCP/N is 100MHZ non-SSC+1.5V_SUS

[8] CLK_DP_NSSCP[8] CLK_DP_NSSCN[35][35] APU_SVC APU_SVD R280 R281 0 0 SVC SVD APU_SIC APU_SID APU_RST# APU_PWRGD[8] APU_PROCHOT#_VDDIO APU_PROCHOT#_VDDIO APU_THERMTRIP#_VDDIO APU_ALERT APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

CLK

[8] CLK_APU_HCLKP[8] CLK_APU_HCLKN

1

LVDS VGA

APU to Travis IC+1.5V_SUS

APU_VGA_AUXP_C C104 APU_VGA_AUXN_C C105 HDMI_SCL HDMI_SDA

APU_VGA_AUXP[9] APU_VGA_AUXN[9] HDMI_SCL[17] HDMI_SDA[17]

CRT I2C to FCH

HDMI Hot-plugR125 2 100K HDMI_HPD[17] Q13 MMST3904-7-F

DP1 to FCH VGA[9] APU_DP_TXP0[9] APU_DP_TXN0 C314 0.1U/16V/X7R C313 0.1U/16V/X7R APU_DP_TXP0_C APU_DP_TXN0_C

C2 C3 K2 K1

D

B8 A8 AH11 AG11 AF10 AE10 AD10 AG12 AH12 C12 A12 A11 D12 B12 B11 C11 E8 K21 AC11

CRT Hot-plugQ14 MMST3904-7-F VGA_HPD_Q 1

R28 300[8] APU_RST#[8] APU_PWRGD TP32 TP19[6][6][6][6][6] APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# TP20 TP16 TP33

R23 300

CTRL

R158 100K R138 10KC

+1.5V_SUS

R269

1K

TEST

[6] APU_DBRDY[6]

APU_DBREQ#

JTAG

C

TP15

TP9 TP10 TP8 TP5 TP4 TP6

+3.3V_ALW

+1.5V_SUS

RSVD

need check POWER[35] APU_VDD_RUN_FB_L R294 0 TP18 TP31 TP34 0 TP28 VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE

R100 10K

R60 1K

[35] APU_VDD_RUN_FB_H

R293

B9 C8 A9 B10 C9 A10

SENSE

FS1R1 DMAACTIVE_L TEST4 TEST5

FS1R1[35] DMAACTIVE_L[8]

Demo BD pull high 1K

100K R near APUINT_LVDS_AUXP+1.5V_SUS 2+1.5V_SUS 51+3.3V_RUN R136 10K+1.5V_SUS+1.5V_SUS LVDS_AUXP_C LVDS_AUXN_C APU_VGA_AUXP_C APU_VGA_AUXN_C R102 R104 R273 R275 *1.8K_NC *1.8K_NC *1.8K_NC *1.8K_NCB

R101 R103

*100K_NC *100K_NC+3.3V_TRAVIS

INT_LVDS_AUXN

50 R266 10K

B

R162 10K 2 MMBT3904 3 Q17 1 2 58 APU_PWRGD[29] THERMTRIP# MMBT3904 3

R268 1K

R265 1K

R262 1K

LVDS_AUXP_C LVDS_AUXN_C APU_VGA_AUXP_C APU_VGA_AUXN_C

R276 R277 R272 R274

*1.8K_NC *1.8K_NC *1.8K_NC *1.8K_NC

+1.5V_RUN

[35] APU_PWRGD_PWM

Q33 1

APU_THERMTRIP#_VDDIO[21] SMBCLK1

Q5B 6

2

1 5

APU_SIC

R267

0

SMB_LV_CLK[7] APU_TEST25_L R263 R95 R264 510/F_6 *0_NC 510/F_6 36+1.2V_VDDPR

DMN5L06DWK[21] SMBDAT1 3

4

APU_SID

R261

0

SMB_LV_DAT[7]

APU_TEST9 APU_TEST25_H

35+1.5V_SUS+1.5V_SUS R255 1K

Q5A DMN5L06DWK APU_TEST12_SCANSHIFTEND APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2+1.5V_SUS+1.5V_SUS APU_TEST21_SCANEN APU_TEST22_SCANSHIFTEN APU_TEST24_SCANCLK1 R20 U1 APU_RST# 1 2 APU_PWRGD 3 A1 GND A2 Y1 VCC Y2 6 5 4+3.3V_SUS APU_PWROK_BUF[6] APU_RST_L_BUF[6] M_TEST M_TEST CONNECTION TBD R76 39.2/F TEST35 PU FOR INTERNAL TEST35 PD FOR CUSTOMER R108 300 0 R26 *300_NC R22 *300_NC R74 *39.2/F_NC APU_TEST35 R107 *300_NC R91 R89 R94 R99 R98 R97 R92 1K 1K 1K 1K 1K 1K 1K

53

APU_PROCHOT#_VDDIOA

A

[21] IMVP_PROCHOT#

R258

0 *74LVC2G07_NC R30 0 59

Debug only(Remove after MP)

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Llano Display/MiscWednesday, January 12, 20111

Rev 1A 4 of 38

Sheet

5

4

3

2

1

+VDD_CORE U10D

+VDD_CORE

U10E

APU POWER TABLEPIN NAME VDD VDDNB VDDIOD

35~40A

NET NAME+VDD_CORE+VDDNB_CORE+1.5VSUS+1.2V_VDDP+1.2V_VDDR+2.5V_VDDA

VOLTAGE+1.1V

+1.5V+1.2V+1.2V+2.5V

VDDP VDDR VDDA

+VDDNB_CORE

C1 D3 D6 E1 F3 F6 F8 G1 H3 H6 H8 J1 K3 K6 L1 L11 L19 M3 M6 M10 M18 N1 N11 N19 P3 P6 P10 P18 R1 R11 R19 T3 J9 J10 J11 J12 J14 J16 K9 K10 G28 H26 J28 K20 K23 K26 L22 L25 L28 M20 M23 M26 N22 N25 N28 P20 P23 P26 AG2 AG3 AG4 AG5 AG6 AG7 AG8 AG9 AE11 AF11

18~20A

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6 VDDNB_7 VDDNB_8

CORE S0

VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63

T6 T10 T18 U1 U11 U19 V3 V6 V10 V18 W1 W11 W13 W15 W17 W19 Y3 Y6 Y10 Y

12 Y14 Y16 Y18 Y20 AA1 AB3 AB6 AC1 AD3 AD6 AE1 K11 K12 K13 K14 K16 K17 K18 L18 R22 R25 R28 T20 T23 T26 U22 U25 U28 V20 V23 V26 W22 W25 W28 Y24 Y26 AA28 A3 A4 B3 B4 A5 A6 B5 B6

Sequence GROUP A(VDDIO,VDDA)↓↓↓ GROUP B(VDD_RUN, VDDNB_RUN, VDDP, VDDR)

+VDDNB_CORE

NB/GPU VDDNB_9 S0VDDNB_10 VDDNB_11 VDDNB_12 VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16

+1.5V_SUS

+1.5V_SUS

4AC

6.5A+1.2V_VDDPR SHARE PAD FOR SPACE R70& R71

VDDP 3.5A

VDDIO_1 VDDIO_19 VDDIO_2 DDDR VDDIO_20 VDDIO_3 S0/S3 VDDIO_21 VDDIO_4 VDDIO_22 VDDIO_5 VDDIO_23 VDDIO_6 VDDIO_24 VDDIO_7 VDDIO_25 VDDIO_8 VDDIO_26 VDDIO_9 VDDIO_27 VDDIO_10 VDDIO_28 VDDIO_11 VDDIO_29 VDDIO_12 VDDIO_30 VDDIO_13 VDDIO_31 VDDIO_14 VDDIO_32 VDDIO_15 VDDIO_33 VDDIO_16 VDDIO_34 VDDIO_17 VDDIO_35 VDDIO_18 VDDIO_36 VDDP_A_1 PCIE VDDP_A_2 S0 VDDP_A_3 VDDP_A_4 VDDP_B_1 VDDP_B_2 VDDP_B_3 VDDP_B_4

+1.2V_VDDPR 55

C22

VDDR 3A 0.75A

VDDR_1 DDR3 PHY VDDR_5 VDDR_2 S0 VDDR_6 VDDR_3 VDDR_7 VDDR_4 VDDR_8

C112 10U/6.3V_8 *10U/6.3V_8_NC

C23 10U/6.3V_8

C24 C110 0.1U/16V/X7R 0.1U/16V/X7R

EC3 *180P_NC

EC2 *180P_NC

EMI reserve55 C300 *1000P_NC C301 1000P 55 C116 *1000P_NC C114 1000P C113 0.1U/16V/X7R C329 0.1U/16V/X7R 55 C332 *0.1U/16V/X7R_NC *0.1U/16V/X7R_NC C331

+2.5V_RUN

L14

0_8 C299 1U/6.3V/X5R C21 0.1U/16V/X7R C20 3300P

PLL VDDA_1 S0VDDA_2

A7 A13 A15 A17 A19 A21 A23 A25 B7 C4 C10 C14 C16 C18 C20 C22 C24 C26 C28 D13 D15 D17 D19 D21 D23 D25 D27 E4 E10 E12 F9 F11 F14 F16 F18 F20 F22 F24 F26 F28 G4 G8 G13 G15 G17 G19 G21 G23 G25 J4 J8 J18 J20 J22 J24 K19 L4 L7 L10 M9 M11 M19 N4 N7 N10 N18 P9 P11 P19 R4 R7 R10 R18 T9

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_68 VSS_67 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74

VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149

T11 T19 U4 U7 U10 U18 V9 V11 V19 W4 W7 W10 W12 W14 W16 W18 Y9 Y22 AA4 AA7 AB9 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AC4 AC7 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 AC28 AD9 AD11 AE4 AE7 AE13 AE15 AE17 AE19 AE21 AE23 AE25 AE27 AF3 AF6 AF9 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AH5 AH8 AH13 AH15 AH17 AH19 AH21 AH2

3 AH25

D

C

B

Keep trace from Res to APU within 0.6" Keep trace from Cap to APU within 1.2"

B

C328 1U/6.3V/X5R

C327 C326 C330 1U/6.3V/X5R 1U/6.3V/X5R 1U/6.3V/X5R 30

DECOUPLING between PROCESSOR and DIMMs+VDD_CORE

BOTTOM SIDE DECOUPLINGC62 10U/6.3V_8 C55 10U/6.3V_8 C42 10U/6.3V_8 C39 C98 C99 *10U/6.3V_8_NC *10U/6.3V_8_NC 10U/6.3V_8 55 C41 0.1U/16V/X7R C46 0.1U/16V/X7R EC6 *180P_NC EC5 *180P_NC C70 0.01U/25V C45 0.01U/25V C47 0.01U/25V

+1.5V_SUS

Across VDDIO and VSS split

C44 10U/6.3V_8

C90 0.1U/16V/X7R

C43 0.1U/16V/X7R

EC9 *180P_NC

EC8 *180P_NC

EMI reserve+VDDNB_CORE

EMI reserve

55 C81 10U/6.3V_8 C93 10U/6.3V_8 C78 10U/6.3V_8 C69 *10U/6.3V_8_NC C88 0.1U/16V/X7R C75 0.1U/16V/X7R

30

+1.5V_SUSA A

55 C311 10U/6.3V_8 C321 C76 C67 *10U/6.3V_8_NC 1U/6.3V/X5R 1U/6.3V/X5R C71 C92 1U/6.3V/X5R 1U/6.3V/X5R C53 C61 C74 C50 C65 C101 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R EC7 *180P_NC EC4 *180P_NC

If the VSS plane is cut to create a VDDIO plane, ceramic capacitors are connected across the VDDIO and VSS plane split as follows

EMI reserve

Quanta Computer Inc.PROJECT: R02Size Date: Document Number

Llano POWER/GNDWednesday, January 12, 20111

Rev 1A 5 of 38

Sheet

5

4

3

2

5

4

3

2

1

HDT+ ConnectorRemove after MP+1.5V_SUSD

Debug only

J7

+1.5V_SUSD

[4] APU_TRST#

APU_TRST#

R190 R189 R188 R187

0 10K 10K 10K

1 3 5 7 9 11 13 15 17 19

CPU_VDDIO1 GND1 GND2 GND3 CPU_TRST_L CPU_DBRDY3 CPU_DBRDY2 CPU_DBRDY1 GND4 CPU_VDDIO2

CPU_TCK CPU_TMS CPU_TDI CPU_TDO CPU_PWROK_BUF CPU_RST_L_BUF CPU_DBRDY0 CPU_DBREQ_L CPU_PLLTEST0 CPU_PLLTEST1

2 4 6 8 10 12 14 16 18 20

APU_TCK APU_TMS APU_TDI

APU_DBREQ#

APU_TCK[4] APU_TMS[4] APU_TDI[4] APU_TDO[4] APU_PW ROK_BUF[4] APU_RST_L_BUF[4] APU_DBRDY[4] APU_DBREQ#[4] APU_TEST19_PLLTEST0[4] APU_TEST18_PLLTEST1[4]

APU_TDI APU_TCK APU_TMS APU_TRST# APU_DBREQ#

R204 R206 R205 R191 R203

1K 1K 1K 1K 300

*HDT+ HEADER_NC

C

C

B

B

A

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Llano DEBUG&OTHERW ednesday, January 12, 2011 Sheet1

Rev 1A of 38

5

4

3

2

1

USB_OC#Function FCH port

DEL MEMHOT# Function/+3.3VU11A T5 T20 T17[21] SIO_SLP_S3#[21] SIO_SLP_S5#[21] SIO_PWRBTN#[29] FCH_PWRGD R338 MEMHOT# SIO_SLP_S3# SIO_SLP_S5# 0 PWR_BTN# FCH_TEST0 FCH_TEST1 FCH_TEST2 SIO_A20GATE EC_KBRST# SIO_EXT_SMI# T19 T18 9[21] SIO_EXT_WAKE# T9 58[21] RSMRST#[22] FCH_PCIE_LAN_CLKREQ# T7 32 23[22] ACZ_SPKR[12,13,20,22] SMB_RUN_CLK0[12,13,20,22] SMB_RUN_DAT0 25 33[22] FCH_PCIE_WLAN_CLKREQ# T2 VGA_PD T8[24] SPI_HOLD#[10] T1 T10[22] USB_OC6#[20] SATA_ODD_PRSNT#[21] AC_PRESENT[22] USB_OC2#[18] USB_OC1#[18] USB_OC0# 10 APU_THERMTRIP# WD_PWRGD 10K AB6 R2 W7 T3 W2 J4 N7 T9 T10 V9 AE22 AG19 R9 C26 T5 U4 K1 V7 R10 AF19 U2 R322 AG24 AE24 AE26 AF22 AH17 AG18 AF24 SMB_RUN_CLK0 AD26 SMB_RUN_DAT0 AD25 SMB_RUN_CLK1 T7 SMB_RUN_DAT1 R7 AG25 FCH_PCIE_WLAN_CLKREQ# AG22 LLB# J2 AG26 V8 W8 R157 0 GEVENT#9 Y6 V10 AA8 AF25 FC

H_PCIE_LAN_CLKREQ# M7 R8 T1 P6 F5 P5 J7 T8 PCIE_RST2#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD USBCLK/14M_25M_48M_OSC USB MISC USB_RCOMP USB_FSD1P/GPIO186 USB_FSD1N USB_FSD0P/GPIO185 USB_FSD0N USB_HSD13P USB_HSD13N USB_HSD12P USB_HSD12N USB_HSD11P USB_HSD11N USB_HSD10P USB_HSD10N USB_HSD9P USB_HSD9N USB_HSD8P USB_HSD8N USB_HSD7P USB_HSD7N USB 2.0 USB_HSD6P USB_HSD6N USB_HSD5P USB_HSD5N USB_HSD4P USB_HSD4N USB_HSD3P USB_HSD3N USB_HSD2P USB_HSD2N USB_HSD1P USB_HSD1N USB_HSD0P USB_HSD0N USB OC USBSS_CALRP USBSS_CALRN USB_SS_TX3P USB_SS_TX3N R310 R314 33 33 ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R R129 R140 33 33 ACZ_SYNC_R ACZ_RST#_R AB3 AB1 AA2 Y5 Y3 Y1 AD6 AE4 K19 J19 J21 D21 C20 D23 C22 F21 E20 F20 A22 E18 A20 J18 H18 G18 B21 K18 D19 A18 C18 B19 B17 A24 D17 AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST# USB_SS_RX3P USB_SS_RX3N USB_SS_TX2P USB_SS_TX2N HD AUDIO USB_SS_RX2P USB_SS_RX2N USB 3.0 USB_SS_TX1P USB_SS_TX1N USB_SS_RX1P USB_SS_RX1N USB_SS_TX0P USB_SS_TX0N USB_SS_RX0P USB_SS_RX0N SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM3/EC_TIMER3/GPIO200 EMBEDDED CTRL KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208 G8 B9 H1 H3 H6 H5 H10 G10 47 K10 J12 G12 F12 K12 K13 B11 D11 E10 F10 C10 A10 H9 G9 25 A8 C8 F8 E8 C6 A6 C5 A5 C1 C3 E1 E3 C16 A16 A14 C14 C12 A12 D15 B15 E14 F14 F15 G15 H13 G13 J16 H16 J15 K15 H19 G19 G22 G21 E22 H22 J22 H21 K21 K22 F22 F24 E24 B23 C24 F18 USB3_TXP1 USB3_TXN1 C235 0.1U/16V/X7R C234 0.1U/16V/X7R USB3_TXP2[18] USB3_TXN2[18] USB3_RXP2[18] USB3_RXN2[18] USB3_TXP1_D[22] USB3_TXN1_D[22] USB3_RXP1[22] USB3_RXN1[22] USB3_TXP0_D[22] USB3_TXN0_D[22] USB3_RXP0[22] USB3_RXN0[22] 47 USBSS_CALRP USBSS_CALRN R349 R348 1K/F 1K/F 14C

USB13 (ESATA_MB) USB_OC0# USB12 (MB) USB11 (I/O) USB10 (I/O)D

USB_RCOMP_SB

R343

11.8K/F_6

USB_OC1# USB_OC2# USB_OC6#

HUDSON-M2ACPI/ WAKE UP EVENTS USB 1.1

25

[21][21][21][21]

SIO_A20GATE EC_KBRST# SIO_EXT_SCI# SIO_EXT_SMI#

Part 4 of 5 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# PME#/GEVENT3# LPC_SMI#/GEVENT23# LPC_PD#/GEVENT5# SYS_RESET#/GEVENT19# WAKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# WD_PWRGD RSMRST# CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51 DDR3_RST#/GEVENT7#/VGA_PD GBE_LED0/GPIO183 SPI_HOLD#/GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

Note: USB P/N pairs with trace lengths up to 10"D

USBP12P_R USBP12N_R

R180 R181

0 0

USBP12P USBP12N

Pl

ease near FCH

USBP12P USBP12N USBP11P USBP11N USBP10P USBP10N USBP9P USBP9N USBP8P USBP8N

[18][18][22][22][22][22][15][15][19][19]

USB 3.0/2.0 Combo (Left) USB 3.0/2.0 Combo (IO) USB 3.0/2.0 Combo (IO) Camera Card Reader

+3.3V_SUS R169 R141 R147 R324 R317 R160 R167 R194 R335 R337 R165 R173 R195 R193 R155 R185 R325 R176 *2.2K_NC *2.2K_NC *2.2K_NC *10K_NC *10K_NC 10K 10K *10K_NC 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K

NC,no install by defaultFCH_TEST0 FCH_TEST1 FCH_TEST2 SIO_SLP_S3# SIO_SLP_S5# GEVENT#9 APU_THERMTRIP# AC_PRESENT LLB# PWR_BTN# SMB_RUN_CLK1 SMB_RUN_DAT1 SMB_RUN_CLK2 SMB_RUN_DAT2 USB_OC0# USB_OC1# USB_OC2# USB_OC6# 9

23

USBP5P USBP5N USBP4P USBP4N

[22][22][22][22]

WNAN (Vostro only) WLAN

C

GPIO

AC_PRESENT high to enter S5+ LLB#, WAKE# and PWR_BTN need pull up to 3.3V_S5+ (SUS) only if S5+ mode is supported

USB_OC6# SATA_ODD_PRSNT# SATA_ODD_MD#_R AC_PRESENT USB_OC2# USB_OC1# USB_OC0#

BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

USBP1P USBP1N USBP0P USBP0N

[25][25][18][18]

Biometric (Vostro only)47

USB 2.0/E-SATA Combo (Left)

+1.1V_SUS

+3.3V_RUN R166 R168 R115 R114 R116 R320 R159 R161 R346 R170 R131 2.2K 2.2K SMB_RUN_CLK0 SMB_RUN_DAT0[22] ACZ_BITCLK_AUDIO[22] ACZ_SDOUT_AUDIO[22] ACZ_SDIN0

10K FCH_PCIE_WLAN_CLKREQ# 10K EC_KBRST# 10K SIO_A20GATE 10K SATA_ODD_PRSNT# 10K WD_PWRGD *10K_NC MEMHOT# *10K_NC SIO_EXT_SMI# 25 *10K_NC SATA_ODD_MD#_R 10K FCH_PCIE_LAN_CLKREQ#+3.3V_RUN 33

[22] ACZ_SYNC_AUDIO[21,22] ACZ_RST#_AUDIO

USB 3.0/2.0 Combo (Left)

PS2_DAT/SDA4/GPIO187 PS2_CLK/CEC/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192 KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/XDB0/GPIO223 KSO_15/XDB1/GPIO224 KSO_16/XDB2/GPIO225 KSO_17/XDB3/GPIO226

near USB3 host controllerUSB3_TXP0 USB3_TXN0 C236 0.1U/16V/X7R C237 0.1U/16V/X7R

USB 3.0/2.0 Combo (IO)

near USB3 host controller

USB 3.0/2.0 Combo (IO)B

2

B

[20] SATA_ODD_MD#

1 2N7002E Q36

3

SATA_ODD_MD#_R

SMB_RUN_CLK2 SMB_RUN_DAT2 SMB_LV_CLK[4] SMB_LV_DAT[4]

SSI verify direct short

R311 R313 R318 R316 R315

*10K_NC *10K_NC *10K_NC *10K_NC *10K_NC

ACZ_BCLK_R ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R

EC_PWM2[11]

6

HD audio interface is+3V_S5 voltage

9

?

A

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Hudson-M3 GPIO/USB/AZ/RGMIIWednesday, January 12, 20111

Rev 1A 38

Sheet

7

of

5

4

3

2

1

[14,22] APU_PCIE_RST# APU_PCIE_RST# is for APU PCIE devices reset C340 150PD

R304

33

PCIE_RST#_R U11E C133 150P

[21][2][2][2][2][2][2][2][2][2][2][2][2][2][2][2][2]

A_RST# UMI_RXP0 UMI_RXN0 UMI_RXP1

UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3 UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3

R149 C132 C135 C143 C137 C145 C153 C162 C154

33 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R UMI_RXP0_C UMI_RXN0_C UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C

AE2 AD5 AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32 AB33 AB31 AB28 AB29 Y33 Y31 Y28 Y29

PCIE_RST# A_RST# UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N

HUDSON-M2Part 1 of 5 PCI CLKS

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39 PCIRST#

AF3 AF1 AF5 AG2 AF6 AB5 AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9 AF18 AE18 AC16 AD18HDD_INT_FCH USB_MCARD2_DET# PCIRST# T16 T13 T12 T15

D

PCI_CLK1[11] PCI_CLK3[11] PCI_CLK4[11]

+1.1V_RUN

R301 R305

590/F 2K/F

FCH_PCIE_CALRP FCH_PCIE_CALRN

AF29 AF31 V33 V31 W30 W32 AB26 AB27 AA24 AA23 AA27 AA26 W27 V27 V26 W26 W24 W23

C

+1.1V_RUN

R347

2K/F INT_CLK_FCH_SRCP INT_CLK_FCH_SRCN

F27 G30 G28 R26 T26 H33 H31 T24 T23

TP36 TP35[4] CLK_DP_NSSCP[4] CLK_DP_NSSCN[14] CLK_PCIE_TRAVISP[14] CLK_PCIE_TRAVISN[4] CLK_APU_HCLKP[4] CLK_APU_HCLKN TP22 TP21

J30 K29 H27 H28

[22] CLK_PCIE_WLANP[22] CLK_PCIE_WLANN

J27 K26 F33 F31

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 PCIE_CALRP AD12/GPIO12 PCIE_CALRN AD13/GPIO13 AD14/GPIO14 GPP_TX0P AD15/GPIO15 GPP_TX0N AD16/GPIO16 GPP_TX1P AD17/GPIO17 GPP_TX1N AD18/GPIO18 GPP_TX2P AD19/GPIO19 GPP_TX2N AD20/GPIO20 GPP_TX3P AD21/GPIO21 GPP_TX3N AD22/GPIO22 AD23/GPIO23 GPP_RX0P AD24/GPIO24 GPP_RX0N AD25/GPIO25 GPP_RX1P AD26/GPIO26 GPP_RX1N AD27/GPIO27 GPP_RX2P AD28/GPIO28 GPP_RX2N AD29/GPIO29 GPP_RX3P AD30/GPIO30 GPP_RX3N AD31/GPIO31 CBE0# CBE1# CBE2# CLK_CALRN CBE3# FRAME# DEVSEL# PCIE_RCLKP IRDY# 100MHZ SSC PCIE_RCLKN TRDY# PAR DISP_CLKP STOP# 100MHZ non-SSC DISP_CLKN PERR# SERR# DISP2_CLKP REQ0# 100MHZ non-SSC DISP2_CLKN REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 APU_CLKP REQ3#/CLK_REQ5#/GPIO42 100MHZ SSC APU_CLKN GNT0# GNT1#/GPO44 SLT_GFX_CLKP GNT2#/SD_LED/GPO45 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 CLKRUN# GPP_CLK0P LOCK# GPP_CLK0N INTE#/GPIO32 GPP_CLK1P INTF#/GPIO33 GPP_CLK1N INTG#/GPIO34 INTH#/GPIO35 GPP_CLK2P GPP_CLK2NPCI EXPRESS INTERFACES

UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N

PCI INTERFACE

PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 T14

[11][11,14][11][11][11]

C

WWAN_RADIO_DIS#

[22] 25

+3.3V_RUN

USB_MCARD1_DET# PCIE_MCARD1_DET# T4 T3

USB_MCARD1_DET#[22] PCIE_MCARD1_DET#[22]

67

USB_MCARD1_DET#

R24

10K 10K 10K

PCIE_MCARD1_DET# R21 USB_MCARD2_DET# R25

WLAN_RADIO_DIS# CLKRUN#[21] 4 19

[22]

24 HDD_INT_FCH R134 10K

HDD_INT_FCH[20] BT_RADI

O_DIS#[22] USB_MCARD2_DET#[22]

B

CLOCK GENERATOR

[22] CLK_PCIE_LANP[22] CLK_PCIE_LANN

E33 E31 M23 M24 M27 M26 N25 N26 R23 R24 N27 R27

GPP_CLK3P GPP_CLK3N GPP_CLK4P GPP_CLK4N GPP_CLK5P GPP_CLK5N GPP_CLK6P GPP_CLK6N GPP_CLK7P GPP_CLK7N

100MHZ SSC capableLPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48LPC

LPC_CLK0 to EC LPC_CLK1 to MINB25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19LPC_CLK0_R LPC_CLK1_R R197 R198 22 0 68 LPC_CLK0 LPC_CLK1 LPC_CLK0[11,21] LPC_CLK1[11,22] LPC_LAD0[21,22] LPC_LAD1[21,22] LPC_LAD2[21,22] LPC_LAD3[21,22] LPC_LFRAME#[21,22] T21 T6 IRQ_SERIRQ[21]

25

B

For EMILPC_CLK0 LPC_CLK1 EC19 EC18

7 *15P_NC *15P_NC

LDRQ#0 LDRQ#1

APU

GPP_CLK8P GPP_CLK8N 14M_25M_48M_OSC

Card Reader

[19] CLK_48M_CARD

ER6 EC17 C348 22P *15P_NC

0

CLK_48M_CARD_R J26

DMA_ACTIVE# PROCHOT# APU_PG LDT_STP# APU_RST# 32K_X1

G25 E28 E26 G26 F26 G2 G4 H7 F1 F3 E6

APU_PWRGD_R APU_STOP#

R345

0

APU_PWRGD T11

DMAACTIVE_L[4] APU_PROCHOT#_VDDIO APU_PWRGD[4] APU_RST#[4]

[4]

32K_X1 32K_X2 S5_CORE_EN is necessary to connect enable pin of+3VPCU/+5VPCU regulator for S5+ mode implementation S5_CORE_EN[21] RTC_CLK[11]+RTC_CELL C224 0.1U/16V/X7R

32K_X1

C346

18P

25M_X1

C31

25M_X1

32K_X2 S5_CORE_EN RTCCLK INTRUDER_ALERT# VDDBT_RTC_G

2

63 R351 25M_X2 S5 PLUS

C347

1

1M/F

25M_X2

32K_X2

4 3

Y2 25MHz 22P

R341 20M

Y1 32.768KHZ C345 18P

C33

INTRUDER_ALERT#

R192

*1M/F_NC

USE GROUND GUARD FOR 32K_X1 AND 32K_X2

? INTRUDER_ALERT# Left not connected (FCH has 50-kohm internal pull-up to VBAT).

A

1 2

A

Quanta Computer Inc.PROJECT: R02Size Document Number

Hudson-M3 ACPI/PCI/CLOCKDate:5 4 3 2

Rev 1A 38

Wednesday, January 12, 20111

Sheet

8

of

5

4

3

2

1

R place close to FCHPLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3[20] SATA_TXP0[20] SATA_TXN0[20] SATA_RXN0[20] SATA_RXP0[20] SATA_TXP1[20] SATA_TXN1[20] SATA_RXN1[20] SATA_RXP1 U11B FCH_CRT_RED FCH_CRT_GRED

AK19 AM19 AL20 AN20 AN22 AL22 AH20 AJ20 AJ22 AH22 AM23 AK23

1

1

SD CARD

2

2

SATA ODD

SATA_TX1P SATA_TX1N SATA_RX1N SATA_RX1P SATA_TX2P SATA_TX2N SATA_RX2N SATA_RX2P

ESATA#1

[18] SATA_RXN3[18] SATA_RXP3

AN24 AL24 AL26 AN26 AJ26 AH26

SATA_RX3N SATA_RX3P SATA_TX4P SATA_TX4N SATA_RX4N SATA_RX4P SATA_TX5P SATA_TX5N SATA_RX5N SATA_RX5P NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13

GBE LAN

[18] SATA_TXP3[18] SATA_TXN3

AH24 AJ24

SATA_TX3P SATA_TX3N

C

SERIAL ATA

GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR

AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9 V6 V5 V3 T6 V1 L30 L32 M29 M28 N30 M33 N32 K31 V28 V29 U28 T31 T33 T29 T28 R32 R30 P29 P28 C29 N2 M3 L2 N4 P1 P3 M1 M5 AG16 AH10 A28 G27 L4

GBE_COL GBE_CRS GBE_MDIO

R312 R307 R132

10K 10K 10K+3.3V_SUS

GBE_RXERR

R308

10K

GBE_PHY_INTR

R164

10KC

AN29 AL28

AK27 AM27 AL29 AN31 AL31 AL33 AH33 AH31 AJ33 AJ31

SPI ROM

SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/SPI_WP#/GPIO161 VGA_RED VGA_GREEN VGA_BLUE VGA_HSYNC/GPO68 VGA_VSYNC/GPO69 VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71 VGA_DAC_RSET AUX_VGA_CH_P AUX_VGA_CH_N AUXCAL

FCH_SPI_W P FCH_CRT_RED FCH_CRT_GRE FCH_CRT_BLU

R319

*10K_NC

FCH_SPI_SI[24] FCH_SPI_SO[24] FCH_SPI_CLK[24] FCH_SPI_CS0#[24]+3.3V_SUS FCH_CRT_RED FCH_CRT_GRE FCH_CRT_BLU[16][16][16]

VGA DAC

FCH_CRT_HSYNC FCH_CRT_VSYNC FCH_DDCDAT FCH_DDCCLK R340 715/F APU_VGA_AUXP[4] APU_VGA_AUXN[4] R321 100/F+1.1V_RUN APU_DP_TXP0 APU_DP_TXN0 APU_DP_TXP1 APU_DP_TXN1 APU_DP_TXP2 APU_DP_TXN2 APU_DP_TXP3 APU_DP_TXN3 FCH_VGA_HPD FCH_GPIO175 FCH_GPIO176 FCH_GPIO177 FCH_GPIO178 FCH_GPIO179 FCH_GPIO180 FCH_GPIO181 FCH_GPIO182 R328 R330 R333 R327 R326 R323 R331 R332 10K 10K 10K 10K 10K 10K 10K 10K[4][4][4][4][4][4][4][4][16][16]

[16][16]

+1.1V_RUN

R154 R143

1K/F 1K/F

SATA_CALRP SATA_CALRN

AF28 AF27 AD22 AF21

SATA_CALRP SATA_CALRN SATA_ACT#/GPIO67 SATA_X1

[26] SATA_LED#

B

Integrated Clock Mode: Leave unconnected. VGA MAINLINK

AG21

SATA_X2

ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N ML_VGA_HPD/GPIO229

+FCH_VDDAN_33_DAC_RB

69

R342 *10K_NC

FCH_VGA_HPD

[4]

[20] FCH_ODD_EN

AH16 AM15 AJ16 AK15 AN16 AL16R184 R183 R336 R179 10K 10K 10K 10K TEMPIN0 TEMPIN1 TEMPIN2 TEMPIN3

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54 FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

HW MONITOR

16[25] KB_LED_DET

K6 K5 K3 M6

VIN0/GPIO175 VIN1/GPIO176 VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179 VIN5/SCLK_1/GPIO180 VIN6/GBE_STAT3/GPIO181 VIN7/GBE_LED3/GPIO182 NC1 NC2 NC3 NC4 NC5

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173 TEMPIN3/TALERT#/GPIO174

?A A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

2

150/F

*10P_NC

R339 150/F

*10P_NC

R334 150/F

1

SATA HDD/SSD

SATA_TX0P SATA_TX0N SATA_RX0N SATA_RX0P

HUDSON-M2

Part 2 of 5 SD_CLK/SCLK_0/GPIO73 SD_CMD/SLOAD_0/GPIO74 SD_CD#/GPIO75 SD_WP/GPIO76 SD_DATA0/SDATI_0/GPIO77 SD_DATA1/SDATO_0/GPIO78 SD_DATA2/GPIO79 SD_DATA3/GPIO80

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

FCH_CRT_BLUD

R329

C342

C344

C343 *10P_NC

Hudson-M3 SATA/HWM/SPIW ednesday, January 12, 2011 Sheet1

Rev 1A of 38

5

4

3

2

1

VDD-- S/B CORE power55 55+3.3V_RUN C150 C151 C146 C160 C124 C129 C155 C147 *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC *10U/6.3V_8_NC 0.1U/16V/X7R *1U/6.3V/X5R_NC 1U/6.3V/X5R *0.1U/16V/X7R_NC *0.1U/16V/X7R_NC+3.3V_RUN L3 77 C130 C127 1U/6.3V/X5R *0.1U/16V/X7R_NCD

VDDQ--3.3V I/O power

102mAAB17 AB18 AE9 AD10 AG7 AC13 AB12 AB13 AB14 AB16 H24 V22 U22 T22 L18 D7 AH29 AG28 M31 V21 Y22 V23 V24 V25 AB10

U11C VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDPL_33_SYS VDDPL_33_DAC VDDPL_33_ML VDDAN_33_DAC VDDPL_33_SSUSB_

S VDDPL_33_USB_S VDDPL_33_PCIE VDDPL_33_SATA LDO_CAP VDDPL_11_DAC VDDAN_11_ML_1 VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4 VDDIO_33_GBE_S GBE LAN

HUDSON-M2PCI/GPIO I/O

0_6

TRACE WIDTH>=15mil

Part 3 of 5 VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9 VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8 VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

T14 T17 T20 U16 U18 V14 V17 V20 Y17 H26 J25 K24 L22 M22 N21 N22 P22 AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27 AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

1007mA

TRACE WIDTH>=100mil+1.1V_RUN C152 C176 C157 C144 C333 *0.1U/16V/X7R_NC *1U/6.3V/X5R_NC 10U/6.3V_8 0.1U/16V/X7R 1U/6.3V/X5R C336 C338 C337 *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC 79 A3 A33 B7 B13 D9 D13 E5 E12 E16 E29 F7 F9 F11 F13 F16 F17 F19 F23 F25 F29 G6 G16 G32 H12 H15 H29 J6 J9 J10 J13 J28 J32 K7 K16 K27 K28 L6 L12 L13 L15 L16 L21 M13 M16 M21 M25 N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33 R4 R11 R25 R28 T11 T16 T18 N8

U11D

+1.1V_CKVDD

+VDDPL_3.3V TRACE WIDTH>=15mil C126 C125 1U/6.3V/X5R *0.1U/16V/X7R_NC+FCH_VDDAN_33_DAC_R+FCH_VDDPL_33_SSUSB_S+FCH_VDDPL_33_SUSB_S

+FCH_VDDPL_33 R182 C214

CLKGEN I/O

47mA 20mA 12mA 200mA 11mA 14mA 11mA 12mA*0_NC *4.7U/6.3V_6_NC

340mA

TRACE WIDTH>=30mil

CKVDD_1.1V-Internal clock Generator I/O power

C221 C196 C203 C211 C231 C222 1U/6.3V/X5R *0.1U/16V/X7R_NC *10U/6.3V_8_NC *1U/6.3V/X5R_NC 0.1U/16V/X7R *1U/6.3V/X5R_NC

+1.5V_SUS+FCH_VDDAN_11_MLDAC L6 77+3.3V_SUS+FCH_VDDPL_33_SSUSB_S 0_6+FCH_VDDAN_11_ML

1088mA

TRACE WIDTH>=100mil

PCIE_VDDR--PCIE I/O power

7mA 226mAC175 0.1U/16V/X7R C182 C180 C174 1U/6.3V/X5R *0.1U/16V/X7R_NC *4.7U/6.3V_6_NC

C161 C148 C149 C131 C335 *0.1U/16V/X7R_NC *1U/6.3V/X5R_NC 10U/6.3V_8 0.1U/16V/X7R *1U/6.3V/X5R_NC

C158 1U/6.3V/X5R

L10 77

0_6 C220 C216 *1U/6.3V/X5R_NC 0.1U/16V/X7R

1337mA

TRACE WIDTH>=50mil

AVDD_SATA--SATA phy power

55 R196 0

+FCH_VDDPL_33_SUSB_S

AA9 AA10

VDDIO_GBE_S_1 VDDIO_GBE_S_2

SERIAL ATA

AB11 AA11

VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9 VDDAN_11_SATA_10

C165 C138 C134 C177 C334 *1U/6.3V/X5R_NC 0.1U/16V/X7R 10U/6.3V_8 *1U/6.3V/X5R_NC *0.1U/16V/X7R_NC

C164 1U/6.3V/X5R

S5_3.3--3.3v standby power55 C232 C230 *1U/6.3V/X5R_NC 0.1U/16V/X7R+3V_AVDD_USB TRACE WIDTH>=50mil+3.3V_SUSC

55

55 C219 C197 1U/6.3V/X5R 1U/6.3V/X5R

3.3V_S5 I/O

L5 77 EMI

0_6 55

470mA

USB

EC16 C201 C200 C210 *0.1U/16V/X7R_NC *10U/6.3V_8_NC 10U/6.3V_8 10U/6.3V_8 0_6 77

+1.1V_SUS

L4

+FCH_VDDAN_11_USB_S C187 1U/6.3V/X5R C186 0.1U/16V/X7R

G7 H8 J8 K8 K9 M9 M10 N9 N10 M12 N12 M11

VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_

33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12 VDDAN_11_USB_S_1 VDDAN_11_USB_S_2 VDDCR_11_USB_S_1 VDDCR_11_USB_S_2 VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 VDDAN_11_SSUSB_S_5

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8 VDDXL_33_S VDDCR_11_S_1 VDDCR_11_S_2

N18 L19 M18 V12 V13 Y12 Y13 W11 G24 N20 M20 J24 M8 AA4

59mA

TRACE WIDTH>=20mil VDDIO33 R127 0+3.3V_SUS

C192 C217 C166 C168 C171 C167 C123 *0.1U/16V/X7R_NC *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC 1U/6.3V/X5R *1U/6.3V/X5R_NC 55

5mA 187mA

+VDDXL_3.3V

R186

0

S5_1.1V--1.1V standby powerTRACE WIDTH>=15mil+1.1V_SUS C193 1U/6.3V/X5R+3.3V_SUS+3.3V_SUS C204 C213 0.1U/16V/X7R *1U/6.3V/X5R_NC 55 C226 0.1U/16V/X7R C228 C227 *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC 55

+3.3V_SUS

TRACE WIDTH>=20mil U12 U13 140mA T12 T13 P16 M14 N14 P13 P14 N16 N17 P17 M17

70mA 12mA 26mA

C178 0.1U/16V/X7R

TRACE WIDTH>=15mil 55 42mA C159 C163 *0.1U/16V/X7R_NC *10U/6.3V_8_NC

VDDPL_11_SYS_S VDDAN_33_HWM_S VDDIO_AZ_S

+VDDPL_1.1V

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64

HUDSON-M2Part 5 of 5

VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33 T21 L28 K33 N28 R6

CORE S0

D

MAIN LINK

PCI EXPRESS

GROUND

C

VSSAN_HWM VSSXL VSSPL_SYS

+1.1V_SUS

L11 77

0_6

+FCH_VDDAN_11_SSUSB_S_R

282mA 424mA

Trace width>=20 mil USB SS C156 1U/6.3V/X5R

C190 C202 *1U/6.3V/X5R_NC 0.1U/16V/X7R

K25 H25

VSSPL_DAC VSSAN_DAC VSSANQ_DAC VSSIO_DAC EFUSE

55

C207 C238 C185 C208 C240 *1U/6.3V/X5R_NC 0.1U/16V/X7R 10U/6.3V_8 *0.1U/16V/X7R_NC *1U/6.3V/X5R_NC

C191 C209 C239 1U/6.3V/X5R *0.1U/16V/X7R_NC *0.1U/16V/X7R_NC

VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 VDDCR_11_SSUSB_S_4

?

POWER

B

+3.3V_RUN

+VDDPL_3.3V+3.3V_RUN+FCH_VDDAN_33_DAC_R

B

L8 77

0_6 C233 1U/6.3V/X5R

55 2+3.3V_SUS R110 1M C225 0.1U/16V/X7R

240mA+15V_ALW 3 R175 Q18 C195 C188 1U/6.3V/X5R *10U/6.3V_8_NC AO3404 1 R171 0_6 C169 0.1U/16V/X7R *0_6_NC

+1.1V_RUN L7 77 C223 C218 *1U/6.3V/X5R_NC 0.1U/16V/X7R 77 0_6 L9 0_6 1

Q20 AO3404 3+1.1V_CKVDD

[7]

VGA_PD R118 10K

2 Q10 2N7002E

C115 *1U/6.3V/X5R_NC 2

3 Q19

+1.1V_SUS

+VDDPL_1.1V

340mA

3

Errata: S3 have 400mV for VDDAN (A12 only)

R117 *10K_NC

+1.1V_RUN

233mAAO3404 1

C117 1U/6.3V/X5R

+5V_RUN+FCH_VDDAN_11_MLDAC

A

2

1

A

Quanta Computer Inc.PROJECT:R02Size Date:5 4 3 2

Document Number

Hudson-M3 POWER/GNDWednesday, January 12, 20111

Rev 1A of 38

Sheet

5

4

3

2

1

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

STRAPS PINSD

R302 *10K_NC

R291 *10K_NC

R298 *10K_NC

R200 *10K_NC

R202 10K

R177 *10K_NC

R344 10K

D

[8][8][8]

PCI_CLK1 PCI_CLK3 PCI_CLK4

[8,21] LPC_CLK0[8,22] LPC_CLK1[7][8] EC_PW M2 RTC_CLK

R303 10K

R292 10K

R299 10K

R199 10K

R201 *10K_NC

R178 10K

R350 *10K_NC

C

C

REQUIRED STRAPS

-------PULL HIGH

PCI_CLK1ALLOW PCIE Gen2

--------

PCI_CLK3USE DEBUG STRAP

PCI_CLK4non_Fusion CLOCK MODE

LPC_CLK0EC ENABLED

LPC_CLK1CLKGEN ENABLEDSetting

EC_PWM2LPC ROM

RTC_CLKS5 PLUS MODE ENABLEDSetting

--------

--------

PULL LOW

--------

FORCE PCIE Gen1Setting

--------

IGNORE DEBUG STRAPSetting

FUSION CLOCK MODESetting

EC DISABLEDSetting

CLKGEN DISABLED

SPI ROM

S5 PLUS MODE DISABLED

Setting

DEBUG STRAPSFCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]B B

[8][8][8]

PCI_AD27 PCI_AD26 PCI_AD25

PCI_AD27 PULL HIGHUSE PCI PLLSetting R145 *2.2K_NC R137 *2.2K_NC R144 *2.2K_NC R142 *2.2K_NC R130 *2.2K_NC

PCI_AD26DISABLE ILA AUTORUNSetting

PCI_AD25USE FC PLLSetting

PCI_AD24USE DEFAULT PCIE STRAPSSetting

PCI_AD23DISABLE PCI MEM BOOTSetting

[8,14] PCI_AD24[8] PCI_AD23

PULL LOW

BYPASS PCI PLL

ENABLE ILA AUTORUN

BYPASS FC PLL

USE EEPROM PCIE STRAPS

ENABLE PCI MEM BOOT

A

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Hudson-M3 STRAP/PWRGDW ednesday, January 12, 2011 Sheet1

Rev 1A of 38

1

2

3

4

5

6

7

8

+1.5V_SUS JDIM1A M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_DQ[63:0][3]

[3] M_A_A[15:0]

A

SO-DIMMA SPD Address is 0XA0 SO-DIMMA TS Address is 0X30[3][3][3][3][3][3][3][3][3][3][3][3][3][3] M_A_BS0 M_A_BS1 M_A_BS2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_W E#

R15 R19

10K/F 10K/F

DIMM0_SA0 DIMM0_SA1

[7,13,20,22][7,13,20,22]B

SMB_RUN_CLK0 SMB_RUN_DAT0[3] M_A_ODT0[3] M_A_ODT1[3] M_A_DM[7..0]

109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

PC2100

DDR3 SDRAM SO-DIMM (204P)

+3.3V_RUN

199 77 122 125

VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

[3] M_A_EVENT#[3] M_A_RST#+SMDDR_VREF_DQ0+SMDDR_VREF_DIMM0

198 30 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

PC2100 DDR3 SDRAM SO-DIMM (204P)

98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

11 28 46 63 136 153 170 187 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

[3] M_A_DQSP[7:0]

[3] M_A_DQSN[7:0]

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

JDIM1B

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

A

B

VTT1 VTT2

203 204

+0.75V_DDR_VTT

GND 205

DDR3 STD SO-DIMM(204P,H8)

C

206

GND

DDR3 STD SO-DIMM(204P,H8)

C

Place these Caps near So-Dimm0.+1.5V_SUS+1.5V_SUS C82 C48 C87 C57 C56D

+SMDDR_VREF_DQ0

+1.5V_SUS

+SMDDR_VREF_DIMM0

75 1U/6.3V/X5R 1U/6.3V/X5R 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8_NC *10U/6.3V_8_NC 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R *0.1U/16V/X7R_NC *0.1U/16V/X7R_NC

+0.75V_DDR_VTT C15 C9 C14 C11 C8 C13 C12 1U/6.3V/X5R 1U/6.3V/X5R 1U/6.3V/X5R 1U/6.3V/X5R 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8_NC 55 21 R151 1K/F R71 1K/F

C97 C96 C94 C73 C91

C66

D

2

2

R150 1K/F

1

C140 0.1U/10V/X5R

C139 1U/6.3V/X5R

R69 1K/F

1C59 0.1U/10V/X5R

C54 1U/6.3V/X5R

Quanta Computer Inc.+3.3V_RUN 55 C18 C16 1U/6.3V/X5R *0.1U/16V/X7R_NC Size Date:1 2 3 4 5 6

PROJECT: R02Document Number

DDR3 DIMM-0W ednesday, January 12, 20117

Rev 1A Sheet 128

of

38

1

2

3

4

5

6

7

8

[3] M_B_A[15:0]

JDIM2A M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ[63:0][3]

+1.5V_SUS

A

SO-DIMMB SPD Address is 0XA4 SO-DIMMB TS Address is 0X34

+3.3V_RUN

R18 R17

10K/F 10K/F

[3][3][3][3][3][3][3][3][3][3][3][3][3][3]

M_B_BS0 M_B_BS1 M_B_BS2 M_B_CS#0 M_B_CS#1 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_W E#

DIMM1_SA0 DIMM1_SA1

[7,12,20,22][7,12,20,22]

SMB_RUN_CLK0 SMB_RUN_DAT0[3] M_B_ODT0[3] M_B_ODT1[3] M_B_DM[7..0]

109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

PC2100 DDR3 SDRAM SO-DIMM (204P)

+3.3V_RUN

199 77 122 125

VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

[3] M_B_EVENT#[3] M_B_RST#+SMDDR_VREF_DQ1+SMDDR_VREF_DIMM1

198 30 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

B

11

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM5 M_B_DM4 M_B_DM6 M_B_DM7 M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP5 M_B_DQSP4 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN5 M_B_DQSN4 M_B_DQSN6 M_B_DQSN7

11 28 46 63 136 153 170 187 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

11

PC2100 DDR3 SDRAM SO-DIMM (204P)

98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

[3] M_B_DQSP[7:0]

205

SODIMM(204P,H4.0,STD)

[3] M_B_DQSN[7:0]

11

SODIMM(204P,H4.0,STD)C C

Place these Caps near So-Dimm1.+1.5V_SUS C51 C103 C102 C52 C106 C86 C85 C100 C95 C72 C58 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8_NC *10U/6.3V_8_NC *10U/6.3V_8_NC 0.1U/16V/X7R 0.1U/16V/X7R 0.1U/16V/X7R *0.1U/16V/X7R_NC *0.1U/16V/X7R_NC+0.75V_DDR_VTT+1.5V_SUS C199 C179 C184 C189 C172 C183 C194 *1U/6.3V/X5R_NC 1U/6.3V/X5R *1U/6.3V/X5R_NC *1U/6.3V/X5R_NC *10U/6.3V_8_NC *10U/6.3V_8_NC *10U/6.3V_8_NC 55+1.5V_SUS

R152 1K/F

+SMDDR_VREF_DQ1

R77 1K/F

+SMDDR_VREF_DIMM1D

D

1

R153 1K/F+3.3V_RUN C19 C17 55 1U/6.3V/X5R *0.1U/16V/X7R_NC

2

2

C142 0.1U/10V/X5R

C141 1U/6.3V/X5R

R75 1K/F

1

C63 0.1U/10V/X5R

C60 1U/6.3V/X5R

Quanta Computer Inc.PROJECT: R02Size Date: Document Number

206

11

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ

46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ43 M_B_DQ46 M_B_DQ40 M_B_DQ41 M_B_DQ47 M_B_DQ42 M_B_DQ45 M_B_DQ44 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ37 M_B_DQ36 M_B_DQ38 M_B_DQ39 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

JDIM2B

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

A

B

VTT1 VTT2

203 204

+0.75V_DDR_VTT

GND

GND

DDR3 DIMM-1W ednesday, January 12, 20117

Rev 1A Sheet 138

of

38

1

2

3

4

5

6

5

4

3

2

1

+1.2V_TRAVIS+3.3V_TRAVIS L12 77 C274 *1U/6.3V/X5R_NC C277 C289 C282 C296 C295 1U/6.3V/X5R 0.1U/16V/X7R *0.1U/16V/X7R_NC 0.01U/25V *0.1U/16V/X7R_NC C288 *0.01U/25V_NC R2 4.7K R5 4.7K 0_6+AVDD12+3.3V_RUN

close to chip pin 1D

R3 *4.7K_NC

R8 *4.7K_NC

D

+DVDD12 TRAVIS_LVDS_EDIDDAT C2 C283 C273 C281 C4 C284 0.1U/16V/X7R 1U/6.3V/X5R 0.1U/16V/X7R *0.1U/16V/X7R_NC 0.01U/25V *0.1U/16V/X7R_NC C10 *0.01U/25V_NC

Q1A 4

5 3 2 Q1B 6 LCD_DDCCLK[15]

LCD_DDCDAT

[15]

TRAVIS_LVDS_EDIDCLK

*2N7002DW-7-F_NC 1

close to chip pin 9,32,46,59+3.3V_TRAVIS

R1 R4

*2N7002DW-7-F_NC 0 0

L13 77 C278 *1U/6.3V/X5R_NC

0_6

+AVDD33 C292 C285 C276 C1 C3 1U/6.3V/X5R *0.1U/16V/X7R_NC 0.1U/16V/X7R *0.1U/16V/X7R_NC 0.01U/25V C279 *0.01U/25V_NC

+3.3V_TRAVIS

close to chip pin 8,25,33,39,63

+3.3V_TRAVIS R250 10K R244 *10K_NC R248 *10K_NC CLK_SEL TRAVIS_GPIO0 2 TRAVIS_TEST 1 Q32 *2N7002W-7-F_NC TRAVIS_BLPWM R249 *10K_NC R241 10K R247 *10K_NC 76C

C

+DVDD33

close to chip pin 13,53C280 C7 1U/6.3V/X5R 0.1U/16V/X7R

R251 *4.7K_NC

[4] APU_BLPWM

APU_BLPWM

3

+3.3V_TRAVIS+3.3V_TRAVIS

R245 R246 C275 R259 R260

10K 1M

TRAVIS_RST# TRAVIS_POR 76+DVDD33+AVDD33 U8

GPIO

CLK_SEL differential 100Mhz Setting OSC 27Mhz

TRAVIS _GPIO0 Control by HW

TRAVIS _TEST TEST mode enable

63mA0.1U/16V/X7R 13 53 8 25 33 39 63 6 7 3 4 INT_LVDS_AUXP INT_LVDS_AUXN R252 APU_BLPWM D15 BAT54A 2 3 C293 C294 0 TRAVIS_BLPWM TRAVIS_POR TRAVIS_RST# CLK_SEL R

256 C291[8] CLK_PCIE_TRAVISP[8] CLK_PCIE_TRAVISN R243 R240 12.4K/F 100P 48 34 12 10 64 INT_LVDS_AUXP_C61 0.1U/16V/X7R INT_LVDS_AUXN_C 0.1U/16V/X7R 60 54 TRAVIS_HPD 58

+3.3V_TRAVIS

*1M_NCINT_LVDS_AUXP *1M_NCINT_LVDS_AUXN

62mA

DVDD33 DVDD33 AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 DPRX_LN1_P DPRX_LN1_N DPRX_LN0_P DPRX_LN0_N DPRX_AUX_P DPRX_AUX_N DPPX_HPD CPU_VARY_BL POR RESET_L CLKSEL R_BIAS OSC_IN OSC_OUT TDO TDI TCK TMS NC1 NC2 NC3 AVSS AVSS AVSS PAD

DVDD12 DVDD12 DVDD12 DVDD12 AVDD12 LVDS_L3_P LVDS_L3_N LVDS_L2_P LVDS_L2_N LVDS_L1_P LVDS_L1_N LVDS_L0_P LVDS_L0_N LVDS_CLKL_P LVDS_CLKL_N LVDS_U3_P LVDS_U3_N LVDS_U2_P LVDS_U2_N LVDS_U1_P LVDS_U1_N LVDS_U0_P LVDS_U0_N LVDS_CLKU_P LVDS_CLKU_N DDC_CLK DDC_DATA BL_EN DIGON VARY_BL

9 32 46 59

+DVDD12

Pull high

87mA1 29 28 24 23 22 21 20 19 27 26 45 44 41 40 38 37 36 35 43 42 49 50 15 14 47

+AVDD12

Control by SW Setting

check FAE1M R need near ANX3110 ICB

Pull low[15][15][15][15][15][15]

TEST mode disable Setting

[4] PEG_LVDS_TXP1[4] PEG_LVDS_TXN1[4] PEG_LVDS_TXP0[4] PEG_LVDS_TXN0[4] INT_LVDS_AUXP[4] INT_LVDS_AUXN

INT_LVDS_TXLOUTP2 INT_LVDS_TXLOUTN2 INT_LVDS_TXLOUTP1 INT_LVDS_TXLOUTN1 INT_LVDS_TXLOUTP0 INT_LVDS_TXLOUTN0

B

INT_LVDS_TXLCLKOUTP[15] INT_LVDS_TXLCLKOUTN[15]

[8,22] APU_PCIE_RST#

+1.5V_RUN

Travis Hot-plugR14 10K TRAVIS_HPD R257 *10K_NC

[8,11]

PCI_AD24

R16

PCIE_RST#_TRAVIS 1 *0_NC

Q4 MMST3904-7-F TRAVIS_LVDS_EDIDDAT TRAVIS_LVDS_EDIDCLK[4] LVDS_HPD_Q 1

3

2

0 CLK_PCIE_TRAVISP_R 31 0 CLK_PCIE_TRAVISN_R 30 54 55 56 57 TRAVIS_TEST 11 51 52 2 5 62 65

TP24 TP26 TP25 TP27A

PANEL_BKEN[21] ENVDD[21] INT_LVDS_PWM[15]

70

R13 100K

ATI FAE:NEED 100KA

GPIO2 GPIO1 GPIO0

18 17 16

TRAVIS_GPIO0

Quanta Computer Inc.PROJECT: R02Size Date: Document Number

ANX3110

DP to LVDS_ANX9834(AMD)Wednesday, January 12, 20111

Rev 1A 38

Sheet

14

of

5

4

3

2

5

4

3

2

1

+15V_ALW

+3.3V_RUN Q31 FDC655BN

+LCDVCC

2

R238 330K

6 5 2 1 3

2

I rush 1.5A 300mA4 31 32 33 34 35

J1

D

R253 47

1

1

2

LCDVCC_ON

C287 10U/10V_8

C286 0.01U/25V

GND GND GND GND GND

2

INT_LVDS_TXLCLKOUTP[14] INT_LVDS_TXLCLKOUTN[14] INT_LVDS_TXLOUTP2[14] INT_LVDS_TXLOUTN2[14] INT_LVDS_TXLOUTP1[14] INT_LVDS_TXLOUTN1[14] INT_LVDS_TXLOUTP0[14] INT_LVDS_TXLOUTN0[14] LCD_DDCDAT LCD_DDCCLK[14][14]

1

R237 *100K_NC

C272 0.01U/25V

Q30A 5 2N7002DW -7-F

2 1

Q30B 2N7002DW -7-F

+3.3V_SUS

R239 10K

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

1

1

USBP9P_R USBP9N_R

DMIC_DATA[22] DMIC_CLK[22]

Camera& DMICD

+INVERTER_POW ER

LCD_TST[21] BLT_PW M R11 10K LCD_BAK[21]

3

6

240+3.3V_RUN

2

1

4

+LCDVCC

3

LVD-A30SFYG+C

C

[21] LCDVCC_TST_EN

2Q29 2N7002W -7-F

1

71

[14] INT_LVDS_PW M

D16 1

3[21] PW M_VADJ

BLT_PW M

1

2BAT54C T/R

R10 10K

USBP9P_R USBP9N_R

EL9 4 1

41

3 2

USBP9P USBP9N

[7][7]

2

*DLP11SN900HL2L_NC

ER2B

0 0B

+INVERTER_POW ER+PW R_SRC 39

ER1

R7

*0_6_NC

Q2 AO3403

LCD: 270mA3

1 1 1

1

2

R12 10K

A

2

2

R9 10K

C6 0.1U/25V/Y5V

2

A

3

2Q3 2N7002W -7-F

RUN_ON[21,33,34]

1

Quanta Computer Inc.PROJECT: R02Size Date: Document Number

LVDS CONNW ednesday, January 12, 2011 Sheet1

Rev 1A 15 of 38

5

4

3

2

5

4

3

2

1

D

D

CRT_RED_L CRT_GRE_L CRT_BLU_L

EL10 EL11 EL12

BLM18BB750SN1D BLM18BB750SN1D BLM18BB750SN1D

FCH_CRT_RED FCH_CRT_GRE FCH_CRT_BLU

[9][9][9]

1

1

EC21 *10P_NC

EC22 *10P_NC

1 2

CRTJ3 CRT_RED_L CRT_GRE_L CRT_BLU_L

EC23 *10P_NC

2

C

1 2 3 4 5 6 7 8 9 10 11 12

2

C

FCH_CRT_HSYNC FCH_CRT_VSYNC FCH_DDCDAT FCH_DDCCLK+5V_RUN+3.3V_RUN[9][9]

[9][9]

196047-12021

B

B

A

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

CRT CONN.W ednesday, January 12, 2011 Sheet1

Rev 1A 16 of 38

1

2

3

4

5

6

7

8

UMA HDMI+5V_RUN+5V_RUN+1.5V_SUS+1.5V_SUS

Reserve for EMI and close to HDMI CONNER17 ER18 EL6[2] INT_HDMI_TXDP2[2] INT_HDMI_TXDN2 INT_HDMI_TXDP2 INT_HDMI_TXDN2 0 0 HDMI_TX2+_C HDMI_TX2-_C

1 4

2 3

*EXC24CG900U_NCA

R111 10K

R112 10K

R105 10K

R106 10K

12 ER15 ER16 INT_HDMI_TXDP1 INT_HDMI_TXDN1 0 0

41

A

5

Q8A HDMI_CLK

Q8B

2

*EXC24CG900U_NC

4DMN5L06DW K Q9A 4

3 5

6

1 2

HDMI_SCL[4]

[2] INT_HDMI_TXDP1[2] INT_HDMI_TXDN1

1 4EL5

2 3

HDMI_TX1+_C HDMI_TX1-_C

HDMI_DAT

DMN5L06DW K Q9B 3 6

1

HDMI_SDA[4]

ER20 ER19 INT_HDMI_TXDP0 INT_HDMI_TXDN0

0 0

41

DMN5L06DW K

DMN5L06DW K

*EXC24CG900U_NC[2] INT_HDMI_TXDP0[2] INT_HDMI_TXDN0 R287 R286 R285 R284 R288 R289 R283 R282 604/F 604/F 604/F 604/F 604/F 604/F 604/F 604/F INT_HDMI_TXDP2 INT_HDMI_TXDN2 INT_HDMI_TXDP1 INT_HDMI_TXDN1 INT_HDMI_TXDP0 INT_HDMI_TXDN0 INT_HDMI_TXCP INT_HDMI_TXCN[2] INT_HDMI_TXCP[2] INT_HDMI_TXCN INT_HDMI_TXCP INT_HDMI_TXCN ER13 ER14 0 0B

2 3EL7

1 4

HDMI_TX0+_C HDMI_TX0-_C

41

B

*EXC24CG900U_NC

1 4EL3

2 3

HDMI_CLK+_C HDMI_CLK-_C

+5V_RUN

2 1Q35 2N7002W -7-F

3

HDMI Conn.CN5??TYPE A

HDMI_TX2+_C HDMI_TX2-_C HDMI_TX1+_CC

HDMI_TX1-_C HDMI_TX0+_C HDMI_TX0-_C HDMI_CLK+_C HDMI_CLK-_C HDMI_CLK HDMI_DAT HDMIF1+5V_RUN 0_1206+5V_HDMI[4] HDMI_HPD

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

D2+ GND D2D1+ GND D1D0+ GND D0CK+ GND CKCEC RSVD SCL SDA GND+5V HPD

22

C

23

GND

1

D

2

C111 *0.1U_NC

20 21

D

Quanta Computer Inc.PROJECT: R02Size Date:1 2 3 4 5 6

Document Number

HDMI CONNW ednesday, January 12, 20117

Rev 1A 178

Sheet

of

38

1

2

3

4

5

6

7

8

S3/S5

USB charging circuit+5V_ALW

USB3.0+ USB2.0+ ESATA+ USB Conn+ Power share

30mAC351 1A

R353 22.1K/F USB_OC0#[7]A

2 10U/6.3V_6 17 16 15 14 13 1 0.1U/16V/Y5VU12

C350 2

+USB_PWR_CHARGE[9][9] USBP0N_L USBP0P_L+5V_ALW[9][9] SATA_RXP3 SATA_RXN3 SATA_TXN3 SATA_TXP3 C198 C205 C212 C215 0.01U/25V SATA_RXP3_C 0.01U/25V SATA_RXN3_C 0.01U/25V SATA_TXN3_C 0.01U/25V SATA_TXP3_C

CN6

[7][7]

USBP0N USBP0P

R354 2

1 0

1 2 3 4

IN DM_OUT DP_OUT ILIM_SEL EN CTL1 CTL2 CTL3

OUT DM_IN DP_IN N/C

12 11 10 9

15 11 10 9 8 7 6 5 16

GND GND GND DETECT# B+ GND

BGND GND GND AD+ A+ DGND VBUS GNDeSATA+SINGLE USB

14 13 12 17 4 3 2 1

PwPd ILIM0 ILIM1 GND FAULT

USB_CHG_DET#

[27]

USBP0P_R USBP0N_R+USB_PWR_CHARGE

+USB_PWR_CHARGE

1

5 6 7 8

TPS2540

47 R352 100K

[21] USB_BACK_EN

[21] USBP0_BUS_SW_CB0B

2

ER10 ER9

0 0B

USBP0_BUS_SW_CB0 Low High R353 OC limitation 100k ohm 22.1k ohm

Mode DCP, Auto-detect CDP, BC Spec 1.1 mAUSBP12N_L+USB_PWR_CHARGE USBP0P_L USBP0N_L

EL14

2 3

1 4

USBP0P_R USBP0N_R

C173 1 C170 1

2 10U/6.3V_8 2 0.1U/16V/X7R

*DLP11SN900HL2L_NC 41 ESD2 USBP12P_L 47 USBP0N_R+USB_RSIDE_PWR USBP0P_R 49 8

480 2171 Applied Now

1 2 3

1 2 3

6 5 4

6 5 4

TVL ST23 04 AD0

C

UPI power switch

USB3.0+ USB2.0+ USB Conn+ Power shareER7 ER8 0 0 65

C

+5V_ALW

I continuous 2A I short 2.3A2 3C353 10U/6.3V_8 C355 0.1U/16V/X7R 4 1

U13 UP7534BRA8-15

I continuous 2A I short 2.3A8 7 6 5+USB_RSIDE_PWR

100 mil+USB_RSIDE_PWR

CN7

close to conn+USB_RSIDE_PWR C352 10U/6.3V_8 C349 0.1U/16V/X7R

1 2 3 4

2

C354 *1U/6.3V/X5R_NC

IN1 IN2 EN# GND

OUT3 OUT2 OUT1 OC#

USB 3.0/2.0 Combo (Left)

[7][7]

USBP12N USBP12P

1

1

EL13 4 1

VBUS DD+ GND SSRXSSRX+ SSTXSSTX+ GNDUSB3/USB2 USB 3.0 GND GND GND GND USB2.0

3 2

USBP12N_L USBP12P_L

1

*DLP11SN900HL2L_NC[7] USB3_RXN2[7] USB3_RXP2[7] USB3_TXN2[7] USB3_TXP2 C243 C242 USB3_RXN2 USB3_RXP2 0.1U/16V/X7R 0.1U/16V/X7R USB3_TXN2_C USB3_TXP2_C

2

2

USB_OC1#[7]

5 6 8 9 7

[21,22] USB_LEFT_EN#

USB 3.0/2.0 Combo (Left)

close to connEU1 *IP4284CZ10-TB_NC

10 11 12 13

D

Platforms should put in PADS for the USB chokes if they have the room. Chokes should be NOPOP.

USB3_TXP2_C USB3_TXN2_C

1 2 3

11+ GND 22+

NC NC GND NC NC

10 9 8 7 6

USB3_TXP2_C USB3_TXN2_C

32D

USB3_RXP2 USB3_RXN2

4 5

USB3_RXP2 USB3_RXN2

Quanta Computer Inc.PROJECT: R02Size Date: Document Number

PUSB/ ESATA/ USB3.0Wednesday, January 12, 20117

Rev 1A of 38

Sheet

188

1

2

3

4

5

6

5

4

3

2

1

Inspiron+CARD_3V3D

SD_D7 SD_D0 SD_D1

SD_W P

C

SCDG1A0100_INS 5IN1-SCDF1A0100-45P-V

XD_CD# SP1 SP2 SP3 SP4 SP5

SD_CLK SD_D6

7 8 9 10 11 12

MS_CLK MS_D3 MS_INS# MS_D2 MS_D0 MS_D1 MS_BS

XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7

C269 C270 C268 1U/6.3V/X5R 0.1U/16V/X7R 1U/6.3V/X5R

25

GND

XD_CD# SP1 SP2 SP3 SP4 SP5

XD_RDY XD_RE# XD_CE# XD_CLE XD_ALE XD_W E# XD_W P

+3.3V_RUN

R226

6.2K/F RREF USBP8_DN USBP8_DP VREG

CLK_IN XD_D7 SP14 SP13 SP12 SP11

SD_D2 SD_D3 SD_D4 SD_CMD SD_D5

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

SD-9(D2) SD-1(D3) MMC-10(D4) SD-2(SD_CMD) MMC-11(D5) SD-3(VSS) SD-4(VDD) MS-10(VSS) MS-9(VCC) MS-8(SCLK) MS-7(D3) MS-6(INS) MS-5(D2) MS-4(D0) MS-3(D1) MS-2(BS) MS-1(VSS) SD-5(CLK) MMC-12(D6) SD-6(GND) MMC-13(D7) SD-7(D0) SD-8(D1)

SD() SD(SW.CD) XD-1(CDSW) XD-0(GND) XD-2(R/-B) XD-3(RE) XD-4(CE) XD-5(CLE) XD-6(ALE) XD-7(WE) XD-8(-WP) XD-9(GND) XD-10(D0) XD-11(D1) XD-12(D2) XD-13(D3) XD-14(D4) XD-15(D5) XD-16(D6) XD-17(D7) XD-18(VCC) SD(SW.WP)

24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

40 41 42 43 44 45

SD_CD# XD_CD#

1

CON1

C271 *10P_NC

U7

24 23 22 21 20 19

XD_D7 SP14 SP13 SP12 SP11

C265 1U/6.3V/X5R_INS

[8] CLK_48M_CARD

2

D

+CARD_3V3

1 2 3 4 5 6

RREF DM DP QFN24 3V3_IN CARD_3V3 V18

SP10 GPIO0 SP9 SP8 SP7 SP6

18 17 16 15 14 13

SP10 SP9 SP8 SP7 SP6

C

VOSTOR+CARD_3V3 C266 1U/6.3V_VOSB

SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9 SP10 SP11 SP12 SP13 SP14

XD_RDY XD_RE# XD_CE# XD_CLE XD_ALE XD_W E# XD_W P XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6

SD_W P SD_D1 SD_D0 SD_D7 SD_CD# SD_D6 SD_CLK SD_D5 SD_CMD SD_D4 SD_D3 SD_D2

MS_CLK MS_INS# MS_D7 MS_D3 MS_D6 MS_D2 MS_D0 MS_D4 MS_D1 MS_D5 MS_BS

CON3 SD_D2 SD_D3 SD_D4 SD_CMD SD_D5

MS_CLK MS_D3 MS_INS# MS_D2 MS_D0 MS_D1 MS_BS SD_CLK SD_D6 SD_D7 SD_D0 SD_D1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

SD-9(D2) SD-1(D3) MMC-10(D4) SD-2(SD_CMD) MMC-11(D5) SD-3(VSS) SD-4(VDD) MS-10(VSS) MS-9(VCC) MS-8(SCLK) MS-7(D3) MS-6(INS) MS-5(D2) MS-4(D0) MS-3(D1) MS-2(BS) MS-1(VSS) SD-5(CLK) MMC-12(D6) SD-6(GND) MMC-13(D7) SD-7(D0) SD-8(D1)TAS_5-250907001000-9_VOS 5in1-scdg2c0101-45p

SD() SD(SW.CD) XD-1(CDSW) XD-0(GND) XD-2(R/-B) XD-3(RE) XD-4(CE) XD-5(CLE) XD-6(ALE) XD-7(WE) XD-8(-WP) XD-9(GND) XD-10(D0) XD-11(D1) XD-12(D2) XD-13(D3) XD-14(D4) XD-15(D5) XD-16(D6) XD-17(D7) XD-18(VCC) SD(SW.WP)

24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Share PinSD_CD# XD_CD# XD_RDY XD_RE# XD_CE# XD_CLE XD_ALE XD_W E# XD_W P XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7 SD_W P ER11 ER12 EL8[7][7] USBP8N USBP8P 0 0

B

3 2

4 1

USBP8_DN USBP8_DP

*DLP11SN900HL2L_NC

A

A

Quanta Computer Inc.PROJECT: R02Size Date:5 4 3 2

Document Number

Cardreader (RTS5128)W ednesday, January 12, 2011 Sheet1

Rev 1A of 38

1

2

3

4

5

6

7

8

SATA ConnectorCON2

ODD Connector24 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 23+5V_MOD S1 4 FFS_INT2_R+5V_RUN S7 P1 19 CN8

GND 12V 12V 12V GND RSVD GND 5V 5V 5V GND GND GND 3.3V 3.3V 3.3V GND TXP TXN GND RXN RXP GND GNDSATA HDD

14

14

A

GND1 TXP TXN GND2 RXN RXP GND3 DP+5V+5V MD GND GND

1 2 3 4 5 6 7 8 9 10 11 12 13

SATA_TXP1_C SATA_TXN1_C SATA_RXN1_C SATA_RXP1_C

C258 C257 C256 C255

0.01U/25V 0.01U/25V 0.01U/25V 0.01U/25V

SATA_TXP1[9] SATA_TXN1[9] SATA_RXN1[9] SATA_RXP1[9]

A

SATA_ODD_PRSNT#[7]+5V_MOD SATA_ODD_MD#[7] R214 *10K_NC+3.3V_RUN

15+3.3V_RUN

15

P6 48325-1106 SATA_RXP0_C SATA_RXN0_C SATA_TXN0_C SATA_TXP0_C C249 C248 C247 C246 0.01U/25V 0.01U/25V 0.01U/25V 0.01U/25V

SATA_RXP0[9] SATA_RXN0[9] SATA_TXN0[9] SATA_TXP0[9]

Place caps close to connector.C253 C254 55

C251 *10U/6.3V_8_NCB

*1U/6.3V/Y5V_6_NC 0.1U/16VB

+3.3V_RUN

+5V_ALW

+5V_MOD

Place caps close to connector.C260 C259 *10U/10V/Y5V_8_NC *1U/6.3V/Y5V_6_NC C261 *0.1U/16V_NC

1.3A1Q23 R218 10K

3AO3413

+5V_RUN

550mA Place caps close to connector.3C263 C264 0.1U/16V[9] FCH_ODD_EN

2C250 4700P/25V

2 1 1Q22 2N7002W -7-F

C262C

*1U/6.3V/Y5V_6_NC *10U/10V/Y5V_8_NC 55

R219 100K

C

19

3

-axis Fall Sensor (HDD data protector)+3.3V_RUN U4

0.4mAC206 C229 0.1U/16V_VOS 1U/6.3V/Y5V_6_VOS

1 2 3 4

VDD_IO GND1

4

SCL SDA SDO Reserved2 GND4 INT2 INT1

14 13 12 11

SMB_RUN_CLK0[7,12,13,22] SMB_RUN_DAT0[7,12,13,22]

+3.3V_RUN

+5V_RUN

Reserved1 GND2 GND3 VDD CS

1

D

2

5 6 7

10D10

2

R222 100K_VOSD

9 8

FFS_INT2 HDD_INT_FCH[8]

1

3

1

2

FFS_INT2_R

Q24 2N7002W -7-F_VOS

SDM10K45-7-F_VOS

2

DE351DLTR_VOS

Quanta Computer Inc.PROJECT: R02Size Date: Document Number

SATA HDD/ODDW ednesday, January 12, 20117

Rev 1A 208

Sheet

of

38

1

2

3

4

5

6

5

4

3

2

1

LPC_CLK0 IMVP_PROCHOT#[4] ER3 *10_NC+RTC_CELL 3 0 1 C79 EC10 *2.2P_NC+3.3V_ALW+3.3V_RUN 2 1 1 R81+3.3V_ALW_AVCC+RTC_VBAT1 0 R85 LAN_PCIE_PWR_CTRL# USB3_SLP_EN# BAT2_LED[26] ALW_ON[27,31] EC_PWROK[29] CAP_LED#[25] ACZ_RST#_AUDIO[7,22] 1.1V_SUS_PWRGD[32] LAN_PCIE_PWR_CTRL#[22] USB_BACK_EN[18] USB3_SLP_EN#[22] CLKRUN#[8]+3.3V_ALW Q6 1 2N7002W-7-F SMBDAT0 SMBCLK0 SMBDAT1 SMBCLK1 S5_CORE_EN KB_DET# USB_LEFT_EN# PCIE_EC_WAKE# 74 SMCLK0/GPB3 SMDAT0/GPB4 SMCLK1/GPC1 SMDAT1/GPC2 PECI/SMCLK2/WUI22/GPF6 SMDAT2/WUI23/GPF7 PS2CLK0/TMB0/GPF0 PS2DAT0/TMB1/GPF1 PS2CLK2/WUI20/GPF4 PS2DAT2/WUI21/GPF5 R66 R65 R72 R68 R50 R59 R64 R32 2.2K 2.2K 2.2K 2.2K 10K 10K 10K 10K+3.3V_SUS SIO_EXT_WAKE# R42 *10K_NC

2 0.1U/16V/X7R

H_PROCHOT#_EC

2

D

2

D

11 26 50 92 114 121

127

3 74

84 83 82

19 20

U2[8,22] LPC_LAD0[8,22] LPC_LAD1[8,22] LPC_LAD2[8,22] LPC_LAD3[8] A_RST#[8,11] LPC_CLK0[8,22] LPC_LFRAME#[15] R83 100K 1 WRST# 1 C89 1U/10V[7][8][7][7] LCD_TST SIO_A20GATE IRQ_SERIRQ SIO_EXT_SMI# SIO_EXT_SCI# D5 2 D2 2 D4 2 D6 2 10 9 8 7 22 13 6 17 1 SDM10K45-7-F 126 5 1 SDM10K45-7-F15 1 SDM10K45-7-F23 14 1 SDM10K45-7-F 4 16

99 98 97 96 93

L80HLAT/BAO/WUI24/GPE0 L80LLAT/WUI7/GPE7

+3.3V_ALW 2

LPC_CLK0

LAD0/GPM0 LAD1/GPM1 LAD2/GPM2 LAD3/GPM3 LPCRST#/WUI4/GPD2 LPCCLK/GPM4 LFRAME#/GPM5 LPCPD#/WUI6/GPE6

HMOSI/GPH6/ID6 HMISO/GPH5/ID5 HSCK/GPH4/ID4 HSCE#/WUI19/GPH3/ID3 CLKRUN#/WUI16/GPH0/ID0

EGCLK/WUI27/GPE3 EGCS#/WUI26/GPE2 EGAD/WUI25/GPE1

SM BUS

110 111 115 116 117 118 85 86 89 90

GPU_TYPE

SMBCLK0 SMBDAT0 SMBCLK1 SMBDAT1 ENVDD

[30,37] Charge,BAT[30,37][4] APU Thermal[4][14] 10 16 22

VCC VSTBY VSTBY VSTBY VSTBY VSTBY

VBAT AVCC

VSTBY

+3.3V_RUN SMBDAT3 SMBCLK3 HOT_KEY1# IRQ_SERIRQ R46 R47 R48 R82 2.2K 2.2K 10K 10K

H_PROCHOT#_EC

1.5V_SUS_ON[33] CLK_TP_SIO[25] DAT_TP_SIO[25]

[7] EC_KBRST#[27] USB_CHG_DET#_R

GA20/GPB5 SERIRQ/GPM6 ECSMI#/GPD4 LPC ECSCI#/GPD3 WRST# KBRST#/GPB6 PWUREQ#/BBO/GPC7

GPIO24 25 28 29 30 31

PS/2

[28,35] IMVP_PWRGD[15,33,34] RUN_ON[23,27] HOT_KEY3#[27] HOT_KEY3_INSTANT_ON#[7] RSMRST#[22] NB_MUTE#[15] LCDVCC_TST_EN[7] SIO_PWRBTN#[30] PS_ID[18,22] USB_LEFT_EN#[25] TP_LED2[30] PBAT_PRES#[37] IINP[7] SIO_SLP_S5#[26] BAT1_LED[22] BEEP[28][28] SMBDAT3 SMBCLK3 R31 0 72

119 123

CRX0/GPC0 CTX0/TMA0/GPB2

IT8518

CIR PWM

PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5

KB_BACKLITE_EN

BRE

ATH_LED[26] HOT_KEY_LED1[23] FAN1_PWM[28] PWM_VADJ[15] HOT_KEY_LED2[23] KB_BACKLITE_EN[25] 22

C

D1 2

80 104 33 88 1 SDM10K45-7-F81 87 109 108 71 72 73 35 34 107 95 94 105 101 102 103

DAC4/DCD0#/GPJ4 DSR0#/GPG6 GINT/CTS0#/GPD5 PS2DAT1/RTS0#/GPF3 DAC5/RIG0#/GPJ5 PS2CLK1/DTR0#/GPF2 TXD/SOUT0/GPB1 RXD/SIN0/GPB0 ADC5/DCD1#/WUI29/GPI5 UART port ADC6/DSR1#/WUI30/GPI6 ADC7/CTS1#/WUI31/GPI7 RTS1#/WUI5/GPE5 PWM7/RIG1#/GPA7 DTR1#/SBUSY/GPG1/ID7 CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2 CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1 FSCK FSCE# FMOSI FMISO

SUS_ON 1.5V_SUS_ON EC_PWROK RUN_ON VRM_ON_EC PANEL_BKEN H_PROCHOT#_EC HOT_KEY_LED1 HOT_KEY_LED2 HOT_KEY_LED3 TP_LED2 KB_BACKLITE_EN 16

R58 R40 R41 R79 R36 R35 R39 R87 R84 R88 R63 R123

10K 10K 10K *10K_NC *10K_NC 10K 10K 10K 10K 10K 10K 10KC

2

TACH0A/GPD6 TACH1A/TMA1/GPD7 TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6

47 48 120 124 R86 *100K_NC

FAN1_TACH[28] 1.5V_SUS_PWRGD[33] LID_SW#[25] SIO_SLP_S3#[7]+3.3V_ALW SYS_PWR_SW#[27] LCD_BAK[15] ACAV_IN[27,37] AC_PRESENT[7]

WAKE UP

PWRSW/GPE4 RI1#/WUI0/GPD0 RI2#/WUI1/GPD1

125 18 21 112

D3 2

SDM10K45-7-F 1

Thermal IC[24][24][24][24]

MODEL_ID SMBDAT3 SMBCLK3

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7

EC_FLASH_SPI_CLK EC_FLASH_SPI_CS# EC_FLASH_SPI_DIN EC_FLASH_SPI_DO[35,36] VRM_ON_EC[23] HOT_KEY_LED3[32,34] SUS_ON[25] KB_DET# VRM_ON_EC R37 KSO16 *0_NC

2.5V_PWRGD

EXTERNAL SERIAL FLASHADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/WUI28/GPI4 66 67 68 69 70

S5_CORE_EN 2.5V_PWRGD

56 57 32 100 106

KSO16/SMOSI/GPC3 KSO17/SMISO/GPC5 PWM6/SSCK/GPA6 SSCE0#/GPG2 SSCE1#/GPG0 KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15

S5_CORE_EN[8] 2.5V_PWRGD[34] APU_PROCHOT#[35] HOT_KEY1#[23] PANEL_BKEN[14]

53

For control VDD,VDDNB,VDDA, need check with ECVRM_ON_EC

R49 0

KB_DET# KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15[25] KSO[0..16]

SPI ENABLE

A/D D/AGPJ0 GPJ1 DAC2/TACH0B/GPJ2 DAC3/TACH1B/GPJ3 76 77 78 79 PCIE_EC_WAKE# USBP0_BUS_SW_CB0[18] SIO_EXT_WAKE#[7] PCIE_EC_WAKE#[22] HOT_KEY2_INSTANT_ON#[27]

B

KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7

VCORE

AVSS

VSS

VSS VSS VSS VSS VSS

36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55

B

KBMX Board ID Straps+3.3V_ALW

CLOCK

CK32KE CK32K

2 128

1

1

1

1

R54 *10K_NC 2 2

R61 *10K_NC 2

R43 *10K_NC 2

R44 *10K_NC 2 R45 10K 2 1

1 R73 10K LAN_PCIE_PWR_CTRL# MODEL_ID USB_BACK_EN USB3_SLP_EN# GPU_TYPE R70 *10K_NC USB_BACK_EN# 0 0 1 1 0

27 49 91 113 122

58 59 60 61 62 63 64 65

75

12

For Crystal-FreeITE8502IX_JX 2 C80 0.1U/16V/X7R 2 2 2 2 R52 10K 1 1

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

1

[25] KSI[0..7] 1

1

R56 10K+3.3V_ALW L2+3.3V_ALW_AVCC 2 BLM11A05S C27 0.1U/16V/X7R LAN_PCIE_PWR_CTRL# 0 0 0 0 0 1

R62 10K

A

+3.3V_ALW L1 BLM11A05S 2 C84 10U/6.3V_6 C49 C77 1U/6.3V/Y5V_6 0.1U/16V C64 0.1U/16V C68 0.1U/16V 1

PINLAN_PCIE_ PWR_CTRL# MODEL_ID

HIGH

L

OW

MODEL_ID 0 0 0 0 0

GPU_TYPE 1 1 1 1 1

USB3_SLP_EN# 0 1 0 1 0

V02 SSI (X00) PT (X01) ST (X02) QT (A00) (A01)

A

DIS Vostro Seymour

UMA InspironSize Document Number

Quanta Computer Inc.PROJECT: R02SIO (ITE8518E)Date: Wednesday, January 12, 20111

Place these caps close to IC GPU_TYPE5 4 3

1

Whistler2

Rev 1A 21 of 38

Sheet