The simplescalar tool set, version 2.0(4)

under Contract DABT63-95-C-0127 and ARPA order no. D346. The current support for this work comes from a variety of sources, all of to which we are indebted.

Control

j - jump

jal - jump and linkjr - jump register

jalr - jump and link registerbeq - branch == 0bne - branch != 0blez - branch <= 0bgtz - branch > 0bltz - branch < 0bgez - branch >= 0

bct - branch FCC TRUEbcf - branch FCC FALSE

Load/Store

lb - load byte

lbu - load byte unsignedlh - load half (short)

lhu - load half (short) unsignedlw - load word

dlw - load double word

l.s - load single-precision FPl.d - load double-precision FPsb - store byte

sbu - store byte unsignedsh - store half (short)

shu - store half (short) unsignedsw - store word

dsw - store double word

s.s - store single-precision FPs.d - store double-precision FPaddressing modes:(C)

(reg+C) (with pre/post inc/dec)(reg+reg) (with pre/post inc/dec)

Integer Arithmetic

add - integer add

addu - integer add unsignedsub - integer subtract

subu - integer subtract unsignedmult - integer multiply

multu - integer multiply unsigneddiv - integer divide

divu - integer divide unsignedand - logical ANDor - logical ORxor - logical XORnor - logical NORsll - shift left logicalsrl - shift right logicalsra - shift right arithmeticslt - set less than

sltu - set less than unsigned

Floating Point Arithmetic

add.s - single-precision (SP) addadd.d - double-precision (DP) addsub.s - SP subtractsub.d - DP subtractmult.s - SP multiplymult.d - DP multiplydiv.s - SP dividediv.d - DP divide

abs.s - SP absolute valueabs.d - DP absolute valueneg.s - SP negationneg.d - DP negationsqrt.s - SP square rootsqrt.d - DP square root

cvt - int., single, double conversionc.s - SP comparec.d - DP compare

Miscellaneous

nop - no operationsyscall - system call

break - declare program error

Figure 2. Summary of SimpleScalar instructions

16-annote

16-opcode

16-annote

16-opcode

6-unused26-target

16-imm

8-rs

8-rt

8-rd

8-ru/shamt

Register format:

Immediate format:

Jump format:

Figure 3. SimpleScalar architecture instruction formats

under Contract DABT63-95-C-0127 and ARPA order no. D346. The current support for this work comes from a variety of sources, all of to which we are indebted.

with the distribution.

The architecture is de ned inss.def, which contains amacro de nition for each instruction in the instruction set. Eachmacro de nes the opcode, name, ags, operand sources and des-tinations, and actions to be taken for a particular instruction.The instruction actions (which appear as macros) that arecommon to all simulators are de ned inss.h. Those actionsthat require different implementations in different simulators arede ned in each simulator code le.

When running a simulator,main() (de ned inmain.c)does all the initialization and loads the target binary into mem-ory. The routine then callssim_main(), which is simulator-speci c, de ned in each simulator code le. sim_main() pre-decodes the entire text segment for faster simulation, and thenbegins simulation from the target program entry point.

The following command-line arguments are available in allsimulators included with the release:-hprints the simulator help message.-dturn on the debug message.-istart execution in the DLite! debugger (see

Section5.2). This option is not supported inthesim-fast simulator.

-qterminate immediately (for use with -dump-con g).-dumpcon g < le>

generate a con guration le saving the com-mand-line parameters. Comments are per-mitted in the con g les, and begin with a #.

-con g < le>read in and use a con guration le. These

les may reference other con g les.

time is not needed.

sim-cache accepts the following arguments, in addition to theuniversal arguments described in Section4:

-cache:dl1 <con g>con gures a level-one data cache.-cache:dl2 <con g>con gures a level-two data cache.-cache:il1 <con g>con gures a level-one instr. cache.-cache:il2 <con g>con gures a level-two instr. cache.-tlb:dtlb <con g>con gures the data TLB.-tlb:itlb <con g>con gures the instruction TLB.- ush <boolean> ush all caches on a system call;

(<boolean> = 0 | 1 | true | TRUE | false | FALSE).

-icompressremap SimpleScalar’s 64-bit

instructions to a 32-bit equivalent inthe simulation (i.e., model amachine with 4-word instructions).

-pcstat <stat>generate a text-based pro le, as

described in Section4.3.The cache con guration (<con g>) is formatted as follows:

<name>:<nsets>:<bsize>:<assoc>:<repl>

4.1 Functional simulation

The fastest, least detailed simulator (sim-fast) resides insim-fast.c.sim-fast does no time accounting, only func-tional simulation—it executes each instruction serially, simulat-ing no instructions in parallel.sim-fast is optimized for rawspeed, and assumes no cache, instruction checking, and has nosupport for DLite!.

A separate version ofsim-fast, calledsim-safe, also performsfunctional simulation, but checks for correct alignment andaccess permissions for each memory reference. Although similar,sim-fast andsim-safe are split (i.e., protection is not toggledwith a command-line argument in a merged simulator) to maxi-mize performance. Neither of the simulators accept any addi-tional command-line arguments. Both versions are very simple:less than 300 lines of code—they therefore make good startingpoints for understanding the internal workings of the simulators.In addition to the simulator le, bothsim-fast andsim-safe usethe following code les (not including header les):main.c,syscall.c,memory.c,regs.c,loader.c, …… 此处隐藏：5510字，全部文档内容请下载后查看。喜欢就下载吧 ……